/*
 * (C) Copyright 2000, 2001
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

#include <common.h>
#include <config.h>
#include <command.h>
#include <i2c.h>
#include "cvmx.h"
#include "octeon-model.h"
#include "lib_octeon_shared.h"

#if defined(CONFIG_OCTEON_GEF_MMC_GENERAL)

    #define MAX_PORTS   8

#else

    #define MAX_PORTS   4

#endif

/* format for adding new post tests */
typedef struct post_test
{
    char    *name;
    int    (*shortTest)(char *);
    int    (*longTest)(char *);

}post_test_t;

int eeprom_mempost_init(char *);
int eeprom_phypost_short(char *);
int eeprom_phypost_long(char *);
int eeprom_pmempost_short(char *);
int eeprom_pmempost_long(char *);
int eeprom_csumpost_short(char *);
int eeprom_csumpost_long(char *);




/* new post tests get added here */
static post_test_t postTest[] =
{
    /* env. name,   short test func.,       long test func. */
    {"mempost",     eeprom_mempost_init,  eeprom_mempost_init},
    {"phypost",     eeprom_phypost_short,   eeprom_phypost_long},
#if defined(CONFIG_OCTEON_GEF_PMEM_GENERAL)
	{"pmempost",    eeprom_pmempost_short,  eeprom_pmempost_long},
#endif
    {"csumpost",    eeprom_csumpost_short,  eeprom_csumpost_long},
    {NULL,NULL,NULL},
};

#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)

extern void eeprom_init  (void);
extern int  eeprom_read  (unsigned dev_addr, unsigned offset,
			  uchar *buffer, unsigned cnt);
extern int  eeprom_write (unsigned dev_addr, unsigned offset,
			  uchar *buffer, unsigned cnt);
#endif

#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)
    #include <version.h>

    #if (CONFIG_OCTEON_EEPROM_TUPLES)
        #include <octeon_eeprom_types.h>
        #include <lib_octeon.h>
        #include <lib_octeon_shared.h>
    #endif

    #include "octeon_boot.h"

void eeprom_script_run(void);
int eeprom_sipi_run(int);
int file_load (uint16_t, octeon_eeprom_file_info_t *, octeon_eeprom_load_and_boot_info_t *);
void eeprom_pfi_sfi_labi_run(void);
int eeprom_dhcp_retry_check(void);
int eeprom_tftp_retry_check(void);
int eeprom_tftp_error_process(void);
int eeprom_error_check(void);
void eeprom_uart_set(void);
int eeprom_csumtest_8bitcheck_ones_comp(octeon_eeprom_csumtest_info_t *);
int eeprom_csumtest_16bitcheck_ones_comp(octeon_eeprom_csumtest_info_t *);
int eeprom_csumtest_32bitcheck_ones_comp(octeon_eeprom_csumtest_info_t *);
int eeprom_csumtest_64bitcheck_ones_comp(octeon_eeprom_csumtest_info_t *);
int eeprom_csumtest_find_and_check(int);
int eeprom_csumtest(void);
int eeprom_memtest_xxbit(uint64_t startAddr, uint64_t endAddr, uint32_t verbose, uint32_t step, uint32_t clear,
                         uint32_t continuous, uint64_t pattern1, uint64_t pattern2, uint32_t failureAction, uint8_t testBitLength);
int eeprom_memtest_find_and_check(int);
int eeprom_memtest(void);
int eeprom_phytest(void);
int eeprom_pmemtest(void);
int eeprom_diags(void);


    #if defined(CONFIG_OCTEON_W3860)
extern int testLlm(uint32_t addr, uint32_t size, int replType, int display);
    #endif

extern int run_command (const char *, int);
extern int had_ctrlc (void);
extern int  miiphy_read (unsigned char, unsigned char, unsigned short *);
extern int octeon_post_error_store(uint8_t);
extern void phyLinkSetup(int);

#if defined(CONFIG_OCTEON_5651x)
extern void phyRegRead (uint8_t mdio_addr, uint16_t reg, uint16_t *val, 
                        uint8_t dev_type, int bus_id);
extern void sfpLinkSetup(void);
#else
extern void sfpLinkSetup(int);
#endif

extern int amcc10gPhyLinkSetup(uint8_t mdio_addr);
extern int amcc_is_phy_alive(uint8_t mdio_addr);


#endif

#ifdef CONFIG_AUTOSCRIPT
int autoscript_enable = 0;
#endif

#if defined(CFG_EEPROM_X40430)
	/* Maximum number of times to poll for acknowledge after write */
#define MAX_ACKNOWLEDGE_POLLS	10
#endif

#if !defined(CVMX_BUILD_FOR_UBOOT) || CONFIG_OCTEON_5651x
static uint8_t __attribute__((unused)) tnpa5651x_spd_values[128] = { OCTEON_TNPA5651X_1GB_667_DDR2_SPD_DATA };
#endif

/* ------------------------------------------------------------------------- */

#if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
	const char *const fmt =
		"\nEEPROM @0x%lX %s: addr %08lx  off %04lx  count %ld ... ";

#if defined(CFG_I2C_MULTI_EEPROMS)
	if (argc == 6) {
		ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
		ulong addr = simple_strtoul (argv[3], NULL, 16);
		ulong off  = simple_strtoul (argv[4], NULL, 16);
		ulong cnt  = simple_strtoul (argv[5], NULL, 16);
#else
	if (argc == 5) {
		ulong dev_addr = CFG_DEF_EEPROM_ADDR;
		ulong addr = simple_strtoul (argv[2], NULL, 16);
		ulong off  = simple_strtoul (argv[3], NULL, 16);
		ulong cnt  = simple_strtoul (argv[4], NULL, 16);
#endif /* CFG_I2C_MULTI_EEPROMS */

# ifndef CONFIG_SPI
		eeprom_init ();
# endif /* !CONFIG_SPI */

		if (strcmp (argv[1], "read") == 0) {
			int rcode;

			printf (fmt, dev_addr, argv[1], addr, off, cnt);

			rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);

			puts ("done\n");
			return rcode;
		} else if (strcmp (argv[1], "write") == 0) {
			int rcode;

			printf (fmt, dev_addr, argv[1], addr, off, cnt);

			rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);

			puts ("done\n");
			return rcode;
		}
	}

	printf ("Usage:\n%s\n", cmdtp->usage);
	return 1;
}
#endif	/* CFG_CMD_EEPROM */

/*-----------------------------------------------------------------------
 *
 * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
 *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
 *
 * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
 *   0x00000nxx for EEPROM address selectors and page number at n.
 */

#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)

#ifndef CONFIG_SPI
#if !defined(CFG_I2C_EEPROM_ADDR_LEN) || CFG_I2C_EEPROM_ADDR_LEN < 1 || CFG_I2C_EEPROM_ADDR_LEN > 2
#error CFG_I2C_EEPROM_ADDR_LEN must be 1 or 2
#endif
#endif

int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
{
	unsigned end = offset + cnt;
	unsigned blk_off;
	int rcode = 0;

	/* Read data until done or would cross a page boundary.
	 * We must write the address again when changing pages
	 * because the next page may be in a different device.
	 */
	while (offset < end) {
		unsigned alen, len, maxlen;
#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
		uchar addr[2];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 8;		/* block number */
		addr[1] = blk_off;		/* block offset */
		alen	= 2;
#else
		uchar addr[3];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 16;		/* block number */
		addr[1] = offset >>  8;		/* upper address octet */
		addr[2] = blk_off;		/* lower address octet */
		alen	= 3;
#endif	/* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */

		addr[0] |= dev_addr;		/* insert device address */

		maxlen = 0x100 - blk_off;
		if (maxlen > I2C_RXTX_LEN)
			maxlen = I2C_RXTX_LEN;
		len    = end - offset;
		if (len > maxlen)
			len = maxlen;
#ifdef CONFIG_SPI
		spi_read (addr, alen, buffer, len);
#else
		if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0)
			rcode = 1;
#endif
		buffer += len;
		offset += len;
	}
	return rcode;
}

/*-----------------------------------------------------------------------
 *
 * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
 *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
 *
 * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
 *   0x00000nxx for EEPROM address selectors and page number at n.
 */

int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
{
	unsigned end = offset + cnt;
	unsigned blk_off;
	int rcode = 0;

#if defined(CFG_EEPROM_X40430)
	uchar	contr_r_addr[2];
	uchar	addr_void[2];
	uchar	contr_reg[2];
	uchar	ctrl_reg_v;
	int	i;
#endif

	/* Write data until done or would cross a write page boundary.
	 * We must write the address again when changing pages
	 * because the address counter only increments within a page.
	 */

	while (offset < end) {
		unsigned alen, len, maxlen;
#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
		uchar addr[2];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 8;		/* block number */
		addr[1] = blk_off;		/* block offset */
		alen	= 2;
#else
		uchar addr[3];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 16;		/* block number */
		addr[1] = offset >>  8;		/* upper address octet */
		addr[2] = blk_off;		/* lower address octet */
		alen	= 3;
#endif	/* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */

		addr[0] |= dev_addr;		/* insert device address */

#if defined(CFG_EEPROM_PAGE_WRITE_BITS)

#define	EEPROM_PAGE_SIZE	(1 << CFG_EEPROM_PAGE_WRITE_BITS)
#define	EEPROM_PAGE_OFFSET(x)	((x) & (EEPROM_PAGE_SIZE - 1))

		maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
#else
		maxlen = 0x100 - blk_off;
#endif
		if (maxlen > I2C_RXTX_LEN)
			maxlen = I2C_RXTX_LEN;

		len = end - offset;
		if (len > maxlen)
			len = maxlen;
#ifdef CONFIG_SPI
		spi_write (addr, alen, buffer, len);
#else
#if defined(CFG_EEPROM_X40430)
		/* Get the value of the control register.
		 * Set current address (internal pointer in the x40430)
		 * to 0x1ff.
		 */
		contr_r_addr[0] = 9;
		contr_r_addr[1] = 0xff;
		addr_void[0]    = 0;
		addr_void[1]    = addr[1];
#ifdef CFG_I2C_EEPROM_ADDR
		contr_r_addr[0] |= CFG_I2C_EEPROM_ADDR;
		addr_void[0]    |= CFG_I2C_EEPROM_ADDR;
#endif
		contr_reg[0] = 0xff;
		if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
			rcode = 1;
		}
		ctrl_reg_v = contr_reg[0];

		/* Are any of the eeprom blocks write protected?
		 */
		if (ctrl_reg_v & 0x18) {
			ctrl_reg_v &= ~0x18;   /* reset block protect bits  */
			ctrl_reg_v |=  0x02;   /* set write enable latch    */
			ctrl_reg_v &= ~0x04;   /* clear RWEL                */

			/* Set write enable latch.
			 */
			contr_reg[0] = 0x02;
			if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
				rcode = 1;
			}

			/* Set register write enable latch.
			 */
			contr_reg[0] = 0x06;
			if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
				rcode = 1;
			}

			/* Modify ctrl register.
			 */
			contr_reg[0] = ctrl_reg_v;
			if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
				rcode = 1;
			}

			/* The write (above) is an operation on NV memory.
			 * These can take some time (~5ms), and the device
			 * will not respond to further I2C messages till
			 * it's completed the write.
			 * So poll device for an I2C acknowledge.
			 * When we get one we know we can continue with other
			 * operations.
			 */
			contr_reg[0] = 0;
			for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
				if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
					break;	/* got ack */
#if defined(CFG_EEPROM_PAGE_WRITE_DELAY_MS)
				udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
#endif
			}
			if (i == MAX_ACKNOWLEDGE_POLLS) {
				puts ("EEPROM poll acknowledge failed\n");
				rcode = 1;
			}
		}

		/* Is the write enable latch on?.
		 */
		else if (!(ctrl_reg_v & 0x02)) {
			/* Set write enable latch.
			 */
			contr_reg[0] = 0x02;
			if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
			       rcode = 1;
			}
		}
		/* Write is enabled ... now write eeprom value.
		 */
#endif
		if (i2c_write (addr[0], offset, alen-1, buffer, len) != 0)
			rcode = 1;

#endif
		buffer += len;
		offset += len;

#if defined(CFG_EEPROM_PAGE_WRITE_DELAY_MS)
		udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
#endif
	}
	return rcode;
}

#ifndef CONFIG_SPI
int
eeprom_probe (unsigned dev_addr, unsigned offset)
{
	unsigned char chip;

	/* Probe the chip address
	 */
#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
	chip = offset >> 8;		/* block number */
#else
	chip = offset >> 16;		/* block number */
#endif	/* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */

	chip |= dev_addr;		/* insert device address */

	return (i2c_probe (chip));
}
#endif

/*-----------------------------------------------------------------------
 * Set default values
 */
#ifndef	CFG_I2C_SPEED
#define	CFG_I2C_SPEED	50000
#endif

#ifndef	CFG_I2C_SLAVE
#define	CFG_I2C_SLAVE	0xFE
#endif

void eeprom_init  (void)
{
#if defined(CONFIG_SPI)
	spi_init_f ();
#endif
#if defined(CONFIG_HARD_I2C) || \
    defined(CONFIG_SOFT_I2C)
	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
#endif
}
/*-----------------------------------------------------------------------
 */
#endif	/* CFG_CMD_EEPROM */
/***************************************************/

#if (CONFIG_COMMANDS & CFG_CMD_EEPROM)

#ifdef CFG_I2C_MULTI_EEPROMS
U_BOOT_CMD(
	eeprom,	6,	1,	do_eeprom,
	"eeprom  - EEPROM sub-system\n",
	"read  devaddr addr off cnt\n"
	"eeprom write devaddr addr off cnt\n"
	"       - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'\n"
);
#else /* One EEPROM */
U_BOOT_CMD(
	eeprom,	5,	1,	do_eeprom,
	"eeprom  - EEPROM sub-system\n",
	"read  addr off cnt\n"
	"eeprom write addr off cnt\n"
	"       - read/write `cnt' bytes at EEPROM offset `off' to/from memory address 'addr'\n"
);
#endif /* CFG_I2C_MULTI_EEPROMS */



#if (CONFIG_OCTEON_EEPROM_TUPLES)


#include <octeon_eeprom_types.h>
#include <lib_octeon.h>
#include <lib_octeon_shared.h>



int write_tlv_tuple(octeon_eeprom_header_t *tlv_hdr_ptr)
{


    uint16_t type = tlv_hdr_ptr->type;
    uint8_t major_version = tlv_hdr_ptr->major_version;
    uint16_t checksum = 0;
    int i;
    uint8_t *eeprom_buf = (void *)tlv_hdr_ptr;
    uint8_t tmp_buf[OCTEON_EEPROM_MAX_TUPLE_LENGTH];

    tlv_hdr_ptr->checksum = 0;
    for (i = 0; i < tlv_hdr_ptr->length; i++)
        checksum += eeprom_buf[i];

    tlv_hdr_ptr->checksum = checksum;


    int addr;

    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, type, major_version, tmp_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);

#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)

    if (addr >= 0)
    {
        /* tuple type alread exists in EEPROM */
        for (i = 0; i < tlv_hdr_ptr->length; i++)
        {
            if (tmp_buf[i] != eeprom_buf[i])
            {
                break;
            }
        }

        if (i == tlv_hdr_ptr->length)
        {

#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)
            //printf("Tuple type %d at addr: 0x%x matches - write not necessary\n", type, addr);
#endif
            return(0);
        }
    }
#endif

    /* Mask addr since it might be negative if no existing tuple found */
    addr &= 0xffff;
    //printf("Writing tuple type %d to addr: 0x%x\n", type, addr);

#if 0
    for (i = 0; i < tlv_hdr_ptr->length; i++)
    {
        printf("cd[0x%02x]:0x%02x\n", i, eeprom_buf[i]);
    }
#endif

    if (eeprom_write (CFG_DEF_EEPROM_ADDR, addr, (uchar *) eeprom_buf, tlv_hdr_ptr->length))
    {
        //printf("Error writing tuple type %d to addr: 0x%x\n", type, addr);
        return(-1);
    }
    return(0);
}



/* Deletes a tuple at a given address in the eeprom */
int delete_tuple(int delete_addr)
{

    /* only used for one structure at a time */
    uint16_t eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *eeprom_buf = (void *)eeprom_buf16;
    octeon_eeprom_header_t *tlv_hdr_ptr = (void *)eeprom_buf;
    int delete_len = octeon_tlv_eeprom_get_next_tuple(CFG_DEF_EEPROM_ADDR, delete_addr, eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);

    if (delete_len < 0)
        return -1;

    printf("Deleting %s (0x%x) tuple at address 0x%x, length %d\n", eeprom_type_to_string(tlv_hdr_ptr->type), tlv_hdr_ptr->type, delete_addr, delete_len);
    /* Erase the tuple that is to be deleted */
    memset(eeprom_buf, 0xff, delete_len);
    eeprom_write (CFG_DEF_EEPROM_ADDR, delete_addr, (uchar *) eeprom_buf, delete_len);


    /* Now copy any tuples after the deleted one to keep the tuples packet as this is required */
    int write_addr = delete_addr;
    int read_addr = delete_addr + delete_len;
    int cur_len;
    while ((cur_len = octeon_tlv_eeprom_get_next_tuple(CFG_DEF_EEPROM_ADDR, read_addr, eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH)) > 0)
    {
        /* We have read the next tuple we want to keep into the eeprom_buf, so now write it over the tuple
        ** we want to delete */
        printf("Copying tuple type %d (len 0x%x)to addr: 0x%x\n", tlv_hdr_ptr->type, tlv_hdr_ptr->length, write_addr);

        if (eeprom_write (CFG_DEF_EEPROM_ADDR, write_addr, (uchar *) eeprom_buf, tlv_hdr_ptr->length))
        {
            printf("Error writing tuple type %d to addr: 0x%x\n", tlv_hdr_ptr->type, write_addr);
            return(-1);
        }
        read_addr += cur_len;
        write_addr += cur_len;
    }

    /* Terminate tuple list */
    memset(eeprom_buf, 0xff, 8);
    eeprom_write (CFG_DEF_EEPROM_ADDR, write_addr, (uchar *) eeprom_buf, 8);

    return 0;
}

#define MIN_TLV_COMMAND_CHARS   3

#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)
void uboot_partition_display(uint32_t partitionType, uint32_t partitionOffset, uint32_t partitionLength)
{
    switch (partitionType)
    {
    case UBOOT_PARTITION:
        printf("FLASH Partition: UBOOT\n");
        break;
    case ENV_PARTITION:
        printf("FLASH Partition: Environment\n");
        break;
    case NFI_PARTITION:
        printf("FLASH Partition: NFI(Normal File Information)\n");
        break;
    default:
        printf("Partition: %u\n", partitionType);
        return;
        break;
    }
    printf ("   FLASH Offset(Bytes): 0x%08x(%dKBytes)\n", partitionOffset, partitionOffset/1024);
    printf ("   FLASH Length(Bytes): 0x%08x(%dKBytes)\n", partitionLength, partitionLength/1024);
}
        #endif

        #if defined(CONFIG_OCTEON_TNPA3804) || defined(CONFIG_OCTEON_AT5810) || defined(CONFIG_OCTEON_TNPA5804)
extern int do_inite1000eeprom (cmd_tbl_t *, int, int, char *);
        #endif

int do_tlv_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{

    DECLARE_GLOBAL_DATA_PTR;
    /* only used for one structure at a time */
    uint16_t eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *eeprom_buf = (void *)eeprom_buf16;

    /* Provide a number of different pointer types to access the eeprom buffer.
    ** There is only one user of the buffer at a time.
    */
    octeon_eeprom_header_t *tlv_hdr_ptr = (void *)eeprom_buf;
    octeon_eeprom_clock_desc_t *cd_ptr = (void *)eeprom_buf;
    octeon_eeprom_board_desc_t *bd_ptr = (void *)eeprom_buf;
    octeon_eeprom_chip_capability_t *cc_ptr = (void *)eeprom_buf;
    octeon_eeprom_mac_addr_t *ma_ptr = (void *)eeprom_buf;
    octeon_eeprom_voltage_multiplier_t *vm_ptr = (void *)eeprom_buf;
    octeon_eeprom_multiplier_desc_t *mult_ptr = (void *)eeprom_buf;
    octeon_eeprom_voltage_desc_t *volt_ptr = (void *)eeprom_buf;
    octeon_eeprom_ddr_clock_desc_t *ddr_clock_ptr = (void *)eeprom_buf;
#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)
    octeon_eeprom_source_ip_info_t *sipi_ptr = (void *)eeprom_buf;
    octeon_eeprom_file_info_t *fi_ptr = (void *)eeprom_buf;
    octeon_eeprom_load_and_boot_info_t *labi_ptr = (void *)eeprom_buf;
    octeon_eeprom_script_id_active_t *sia_ptr = (void *)eeprom_buf;
    octeon_eeprom_script_t *s_ptr = (void *)eeprom_buf;
    octeon_eeprom_uart_info_t *uart_ptr = (void *)eeprom_buf;
    octeon_eeprom_csumtest_info_t *csumtesti_ptr = (void *)eeprom_buf;
    octeon_eeprom_memtest_info_t *memtesti_ptr = (void *)eeprom_buf;
    octeon_eeprom_phytest_info_t *phytesti_ptr = (void *)eeprom_buf;
    octeon_eeprom_pmemtest_info_t *pmemtesti_ptr = (void *)eeprom_buf;
    octeon_eeprom_uboot_info_t *uvi_ptr = (void *)eeprom_buf;
    octeon_eeprom_rldramtest_info_t *rldramtesti_ptr = (void *)eeprom_buf;
    uint16_t addr = BOARD_EEPROM_UBOOT_START;
#else
    uint16_t addr = 0;
#endif /* CONFIG_OCTEON_TNPA3804 || CONFIG_OCTEON_AT5810 || CONFIG_OCTEON_TNPA5804 */

#ifdef   CONFIG_EEPROM_TLV_BASE_ADDRESS
    addr = CONFIG_EEPROM_TLV_BASE_ADDRESS;
    printf("CONFIG_EEPROM_TLV_BASE_ADDRESS: 0x%x\n", CONFIG_EEPROM_TLV_BASE_ADDRESS);
#endif
    int len = 0;

    eeprom_init ();

    if (argc < 2 || (argc == 2 && !strcmp(argv[1], "help")) || strlen(argv[1]) < MIN_TLV_COMMAND_CHARS)
    {
        puts(cmdtp->help);
        /* Print out board type table here */
        int i;
        printf("Board types: \n");
        for (i = 1; i < CVMX_BOARD_TYPE_MAX; i++)
        {
            printf("%20s\t", cvmx_board_type_to_string(i));
            if ((i - 1)%3 == 2)
                printf("\n");
        }
        printf("\n");
        /* list special board types */
        for (i = CVMX_BOARD_TYPE_CUST_PRIVATE_MIN+1; i < CVMX_BOARD_TYPE_CUST_PRIVATE_MAX; i++)
            printf("\t%10s:\t %d\n", cvmx_board_type_to_string(i), i);

        return 1;
    }
    if (strncmp (argv[1], "delete", strlen(argv[1])) == 0)
    {
        int delete_addr = simple_strtoul (argv[2], NULL, 0);

        if (delete_tuple(delete_addr) < 0)
        {
            printf("Error deleting tuple (address %d (0x%x).\n", delete_addr, delete_addr);
            return -1;
        }
    }
    else if (strncmp (argv[1], "display", strlen(argv[1])) == 0) {

        while ((len = octeon_tlv_eeprom_get_next_tuple(CFG_DEF_EEPROM_ADDR, addr, eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH)) > 0)
        {

            printf("==========================================\n");
            printf("%s (0x%x) tuple found: at addr 0x%x\n", eeprom_type_to_string(tlv_hdr_ptr->type), tlv_hdr_ptr->type, addr);
            printf("type: 0x%x, len: 0x%x, csum: 0x%x, maj_ver: %d, min_ver: %d\n",
                   tlv_hdr_ptr->type, tlv_hdr_ptr->length, tlv_hdr_ptr->checksum, tlv_hdr_ptr->major_version, tlv_hdr_ptr->minor_version);
            switch (tlv_hdr_ptr->type)
            {

            case EEPROM_CLOCK_DESC_TYPE:
                if (tlv_hdr_ptr->major_version > OCTEON_EEPROM_CLOCK_DESC_MAJOR_VER)
                {
                    printf("WARNING: tuple version mismatch, display may be wrong. (compiled for version: %d)\n",OCTEON_EEPROM_CLOCK_DESC_MAJOR_VER); 
                }


                if (tlv_hdr_ptr->major_version == 1)
                {
                    struct octeon_eeprom_clock_desc_v1 clock_v1;
                    memcpy(&clock_v1, tlv_hdr_ptr, sizeof(clock_v1));
                    printf("DDR clock: %d Mhz (raw: 0x%x)\n", clock_v1.ddr_clock_mhz, clock_v1.ddr_clock_mhz);
                    printf("CPU ref clock: %d Mhz (raw: 0x%x)\n", clock_v1.cpu_ref_clock_mhz_x_8 >> 3, clock_v1.cpu_ref_clock_mhz_x_8);
                    break;
                }

                printf("DDR clock: %d Mhz (raw: 0x%x)\n", cd_ptr->ddr_clock_mhz, cd_ptr->ddr_clock_mhz);
                printf("CPU ref clock: %d Mhz (raw: 0x%x)\n", cd_ptr->cpu_ref_clock_mhz_x_8>> 3, cd_ptr->cpu_ref_clock_mhz_x_8);
                printf("DFA ref clock: %d Mhz (raw: 0x%x)\n", cd_ptr->dfa_ref_clock_mhz_x_8 >> 3, cd_ptr->dfa_ref_clock_mhz_x_8);
                break;

            case EEPROM_BOARD_DESC_TYPE:
                if (tlv_hdr_ptr->major_version != OCTEON_EEPROM_BOARD_DESC_MAJOR_VER)
                {
                    printf("WARNING: tuple version mismatch, display may be wrong. (compiled for version: %d)\n",OCTEON_EEPROM_BOARD_DESC_MAJOR_VER); 
                }

                printf("Board type: %s (0x%x) \n", cvmx_board_type_to_string(bd_ptr->board_type), bd_ptr->board_type);
                printf("Board revision major:%d, minor:%d\n", bd_ptr->rev_major, bd_ptr->rev_minor);
                bd_ptr->serial_str[OCTEON_SERIAL_LEN -1] = 0;
                printf("Board ser #: %s\n", bd_ptr->serial_str);



                break;

            case EEPROM_CHIP_CAPABILITY_TYPE:
                printf("Coremask: 0x%04x, voltage_x100: %d, cpu_freq_mhz: %d\n",
                       cc_ptr->coremask, cc_ptr->voltage_x100, cc_ptr->cpu_freq_mhz);


                break;
            case EEPROM_MAC_ADDR_TYPE:

#ifdef CONFIG_OCTEON_TNPA5854
                printf("MAC Count                   : 0x%02x\n", ma_ptr->count);
                printf("Fabric Interface 0 MAC      : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->fabric_int0[0],
                       ma_ptr->fabric_int0[1],
                       ma_ptr->fabric_int0[2],
                       ma_ptr->fabric_int0[3],
                       ma_ptr->fabric_int0[4],
                       ma_ptr->fabric_int0[5]);
                printf("Fabric Interface 1 MAC      : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->fabric_int1[0],
                       ma_ptr->fabric_int1[1],
                       ma_ptr->fabric_int1[2],
                       ma_ptr->fabric_int1[3],
                       ma_ptr->fabric_int1[4],
                       ma_ptr->fabric_int1[5]);
                printf("Fabric Interface 2 MAC      : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->fabric_int2[0],
                       ma_ptr->fabric_int2[1],
                       ma_ptr->fabric_int2[2],
                       ma_ptr->fabric_int2[3],
                       ma_ptr->fabric_int2[4],
                       ma_ptr->fabric_int2[5]);
                printf("Fabric Interface 3 MAC      : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->fabric_int3[0],
                       ma_ptr->fabric_int3[1],
                       ma_ptr->fabric_int3[2],
                       ma_ptr->fabric_int3[3],
                       ma_ptr->fabric_int3[4],
                       ma_ptr->fabric_int3[5]);
                printf("Front Panel Interface 0 MAC : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->fp_int0[0],
                       ma_ptr->fp_int0[1],
                       ma_ptr->fp_int0[2],
                       ma_ptr->fp_int0[3],
                       ma_ptr->fp_int0[4],
                       ma_ptr->fp_int0[5]);
                printf("Front Panel Interface 1 MAC : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->fp_int1[0],
                       ma_ptr->fp_int1[1],
                       ma_ptr->fp_int1[2],
                       ma_ptr->fp_int1[3],
                       ma_ptr->fp_int1[4],
                       ma_ptr->fp_int1[5]);
                printf("Front Panel Interface 2 MAC : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->fp_int2[0],
                       ma_ptr->fp_int2[1],
                       ma_ptr->fp_int2[2],
                       ma_ptr->fp_int2[3],
                       ma_ptr->fp_int2[4],
                       ma_ptr->fp_int2[5]);
                printf("Front Panel Interface 3 MAC : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->fp_int3[0],
                       ma_ptr->fp_int3[1],
                       ma_ptr->fp_int3[2],
                       ma_ptr->fp_int3[3],
                       ma_ptr->fp_int3[4],
                       ma_ptr->fp_int3[5]);
                printf("Base Interface 0 MAC        : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->base_int0[0],
                       ma_ptr->base_int0[1],
                       ma_ptr->base_int0[2],
                       ma_ptr->base_int0[3],
                       ma_ptr->base_int0[4],
                       ma_ptr->base_int0[5]);
                printf("Base Interface 1 MAC        : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->base_int1[0],
                       ma_ptr->base_int1[1],
                       ma_ptr->base_int1[2],
                       ma_ptr->base_int1[3],
                       ma_ptr->base_int1[4],
                       ma_ptr->base_int1[5]);
#else

#ifdef CONFIG_OCTEON_TNPA5651X
                printf("MAC Count                   : 0x%02x\n", ma_ptr->count);
                printf("Fabric Interface 0 MAC      : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->amc_port0[0],
                       ma_ptr->amc_port0[1],
                       ma_ptr->amc_port0[2],
                       ma_ptr->amc_port0[3],
                       ma_ptr->amc_port0[4],
                       ma_ptr->amc_port0[5]);
                printf("Fabric Interface 1 MAC      : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->amc_port1[0],
                       ma_ptr->amc_port1[1],
                       ma_ptr->amc_port1[2],
                       ma_ptr->amc_port1[3],
                       ma_ptr->amc_port1[4],
                       ma_ptr->amc_port1[5]);
                printf("Front Panel Interface 0 MAC : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->qlm1_port[0],
                       ma_ptr->qlm1_port[1],
                       ma_ptr->qlm1_port[2],
                       ma_ptr->qlm1_port[3],
                       ma_ptr->qlm1_port[4],
                       ma_ptr->qlm1_port[5]);
                printf("Front Panel Interface 1 MAC : %02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->qlm3_port[0],
                       ma_ptr->qlm3_port[1],
                       ma_ptr->qlm3_port[2],
                       ma_ptr->qlm3_port[3],
                       ma_ptr->qlm3_port[4],
                       ma_ptr->qlm3_port[5]);

#else				
                printf("MAC base: %02x:%02x:%02x:%02x:%02x:%02x, count: %d\n",
                       ma_ptr->mac_addr_base[0],
                       ma_ptr->mac_addr_base[1],
                       ma_ptr->mac_addr_base[2],
                       ma_ptr->mac_addr_base[3],
                       ma_ptr->mac_addr_base[4],
                       ma_ptr->mac_addr_base[5],
                       ma_ptr->count);
#endif
				
#endif
                break;
            case EEPROM_VOLT_MULT_TYPE:
                printf("Voltage: %d millivolts\n", vm_ptr->voltage_millivolts);
                printf("CPU multiplier: %d\n", vm_ptr->cpu_multiplier);
                break;
            case EEPROM_DDR_CLOCK_DESC_TYPE:
                printf("DDR ref Hz: %d, clock Hz: %d\n", ddr_clock_ptr->ddr_ref_hz, ddr_clock_ptr->ddr_clock_hz);
                break;
            case EEPROM_VOLTAGE_TYPE:
                printf("CPU voltage: %d Millivolts\n", volt_ptr->octeon_core_voltage_mv);
                break;

            case EEPROM_MULTIPLIER_TYPE:
                printf("CPU Multiplier: %d (0x%x), IO Multiplier: %d (0x%x)\n", mult_ptr->octeon_core_mult, mult_ptr->octeon_core_mult,
                       mult_ptr->octeon_io_mult, mult_ptr->octeon_io_mult);
                break;
            case EEPROM_DEFAULT_MODULE_CAPABILITY_TYPE:
                break;
            case EEPROM_DELETE_ME:
                
                break;


#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)
                /* Source IP Information */
            case EEPROM_SIPI0_TYPE:
            case EEPROM_SIPI1_TYPE:
            case EEPROM_SIPI2_TYPE:
            case EEPROM_SIPI3_TYPE:
            case EEPROM_SIPI4_TYPE:
            case EEPROM_SIPI5_TYPE:
            case EEPROM_SIPI6_TYPE:
            case EEPROM_SIPI7_TYPE:
            case EEPROM_SIPI8_TYPE:
            case EEPROM_SIPI9_TYPE:
                printf("Ethernet Port ID:     %s\n", &sipi_ptr->eth_port_id[0]);
                printf("DHCP Enable:          0x%02x\n", sipi_ptr->dhcp_enable);
                printf("DHCP Number Retries:  0x%02x\n", sipi_ptr->dhcp_num_retries);
                printf("IP Address:           %s\n", &sipi_ptr->ip_addr[0]);
                printf("Subnet Mask:          %s\n", &sipi_ptr->subnet_mask[0]);
                printf("Default Gateway:      %s\n", &sipi_ptr->default_gateway[0]);
                break;
                /* File Information */
            case EEPROM_PFI0_IMAGE_TYPE:
            case EEPROM_PFI1_IMAGE_TYPE:
            case EEPROM_PFI2_IMAGE_TYPE:
            case EEPROM_PFI3_IMAGE_TYPE:
            case EEPROM_PFI4_IMAGE_TYPE:
            case EEPROM_PFI5_IMAGE_TYPE:
            case EEPROM_PFI6_IMAGE_TYPE:
            case EEPROM_PFI7_IMAGE_TYPE:
            case EEPROM_PFI8_IMAGE_TYPE:
            case EEPROM_PFI9_IMAGE_TYPE:
            case EEPROM_PFI10_IMAGE_TYPE:
            case EEPROM_PFI11_IMAGE_TYPE:
            case EEPROM_PFI12_IMAGE_TYPE:
            case EEPROM_PFI13_IMAGE_TYPE:
            case EEPROM_PFI14_IMAGE_TYPE:
            case EEPROM_PFI15_IMAGE_TYPE:
            case EEPROM_SFI0_IMAGE_TYPE:
            case EEPROM_SFI1_IMAGE_TYPE:
            case EEPROM_SFI2_IMAGE_TYPE:
            case EEPROM_SFI3_IMAGE_TYPE:
            case EEPROM_SFI4_IMAGE_TYPE:
            case EEPROM_SFI5_IMAGE_TYPE:
            case EEPROM_SFI6_IMAGE_TYPE:
            case EEPROM_SFI7_IMAGE_TYPE:
            case EEPROM_SFI8_IMAGE_TYPE:
            case EEPROM_SFI9_IMAGE_TYPE:
            case EEPROM_SFI10_IMAGE_TYPE:
            case EEPROM_SFI11_IMAGE_TYPE:
            case EEPROM_SFI12_IMAGE_TYPE:
            case EEPROM_SFI13_IMAGE_TYPE:
            case EEPROM_SFI14_IMAGE_TYPE:
            case EEPROM_SFI15_IMAGE_TYPE:
                printf("FLASH File Location:      %s\n",     &fi_ptr->flash_file_location[0]);
                printf("FLASH File Transfer Size: %s\n",     &fi_ptr->flash_file_transfer_size[0]);
                printf("SIPI ID:                  0x%02x\n", fi_ptr->sipi_id);
                printf("TFTP File Name:           %s\n",     &fi_ptr->tftp_file_name[0]);
                printf("TFTP Server:              %s\n",     &fi_ptr->tftp_server[0]);
                printf("TFTP Number Retries:      0x%02x\n", fi_ptr->tftp_num_retries);
                break;
                /* Load And Boot Information */
            case EEPROM_LABI0_IMAGE_TYPE:
            case EEPROM_LABI1_IMAGE_TYPE:
            case EEPROM_LABI2_IMAGE_TYPE:
            case EEPROM_LABI3_IMAGE_TYPE:
            case EEPROM_LABI4_IMAGE_TYPE:
            case EEPROM_LABI5_IMAGE_TYPE:
            case EEPROM_LABI6_IMAGE_TYPE:
            case EEPROM_LABI7_IMAGE_TYPE:
            case EEPROM_LABI8_IMAGE_TYPE:
            case EEPROM_LABI9_IMAGE_TYPE:
            case EEPROM_LABI10_IMAGE_TYPE:
            case EEPROM_LABI11_IMAGE_TYPE:
            case EEPROM_LABI12_IMAGE_TYPE:
            case EEPROM_LABI13_IMAGE_TYPE:
            case EEPROM_LABI14_IMAGE_TYPE:
            case EEPROM_LABI15_IMAGE_TYPE:
                printf("Boot Command:  %s\n", labi_ptr->boot_command);
                printf("Image Address: %s\n", labi_ptr->image_addr);
                printf("Command Arg:   %s\n", labi_ptr->cmd_arg);
                break;
                /* Script ID Active */
            case EEPROM_SCRIPT_ID_ACTIVE_TYPE:
                printf("Script ID: 0x%02x\n", sia_ptr->id);
                break;
                /* Scripts */
            case EEPROM_SCRIPT0_TYPE:
            case EEPROM_SCRIPT1_TYPE:
            case EEPROM_SCRIPT2_TYPE:
            case EEPROM_SCRIPT3_TYPE:
                printf("Script Data:\n%s\n", &s_ptr->script_data[0]);
                break;
            case EEPROM_UARTCONI_TYPE:
            case EEPROM_UARTMMCI_TYPE:
                printf("Baudrate: %s\n", &uart_ptr->baudrate[0]);
                break;
            case EEPROM_CSUMTESTI0_TYPE:
            case EEPROM_CSUMTESTI1_TYPE:
            case EEPROM_CSUMTESTI2_TYPE:
            case EEPROM_CSUMTESTI3_TYPE:
                printf("Start:             0x%08x\n", csumtesti_ptr->start);
                printf("End:               0x%08x\n", csumtesti_ptr->end);
                printf("Checksum Location: 0x%08x\n", csumtesti_ptr->csum_loc);
                printf("Algorithm:         0x%02x\n", csumtesti_ptr->algorithm);
                printf("Failure Action:    0x%02x\n", csumtesti_ptr->failure_action);
                break;
            case EEPROM_MEMTESTI0_TYPE:
            case EEPROM_MEMTESTI1_TYPE:
            case EEPROM_MEMTESTI2_TYPE:
            case EEPROM_MEMTESTI3_TYPE:
                printf("Start:          0x%016qx\n", memtesti_ptr->start);
                printf("End:            0x%016qx\n", memtesti_ptr->end);
                printf("Pattern1:       0x%016qx\n", memtesti_ptr->pattern1);
                printf("Pattern2:       0x%016qx\n", memtesti_ptr->pattern2);
                printf("Step:           0x%08x\n", memtesti_ptr->step);
                printf("Algorithm:      0x%02x\n", memtesti_ptr->algorithm);
                printf("Verbose:        0x%02x\n", memtesti_ptr->verbose);
                printf("Failure Action: 0x%02x\n", memtesti_ptr->failure_action);
                break;
            case EEPROM_PHYTESTI_TYPE:
                printf("Algorithm:            0x%02x\n", phytesti_ptr->algorithm);
                printf("Device Selection Map: 0x%04x\n", phytesti_ptr->dev_sel_map);
                printf("Failure Action:       0x%02x\n", phytesti_ptr->failure_action);
                break;
            case EEPROM_PMEMTESTI_TYPE:
                printf("Algorithm:            0x%02x\n", pmemtesti_ptr->algorithm);
                printf("Verbose:              0x%02x\n", pmemtesti_ptr->verbose);
                printf("Failure Action:       0x%02x\n", pmemtesti_ptr->failure_action);
                break;
            case EEPROM_RLDRAM_TEST_TYPE:
                printf("Address:              0x%08x\n", rldramtesti_ptr->addr);
                printf("Data Size:            0x%08x\n", rldramtesti_ptr->size);
                printf("Replication Type:     %s\n",     
                       ((rldramtesti_ptr->replType == 0) ? "None" : 
                        (rldramtesti_ptr->replType == 2)  ? "X2"   :  
                        (rldramtesti_ptr->replType == 4)  ? "X4"   : 
                        (rldramtesti_ptr->replType == 8)  ? "X8"   : "uknown" ));   

                printf("Display:              %s\n",     ((rldramtesti_ptr->display) ? "On":"Off"));
                break;
            case EEPROM_UBOOT_FAILSAFE_INFO_TYPE:
            case EEPROM_UBOOT_NORMAL_INFO_TYPE:
                printf("Version Number: %s\n", uvi_ptr->version_num);
                if (uvi_ptr->active)
                {
                    printf("This U-Boot Version Is Active\n");
                }
                else
                {
                    printf("This U-Boot Version Is Inactive\n");
                }
                uboot_partition_display(uvi_ptr->uboot_partition_type, uvi_ptr->uboot_partition_offset,
                                        uvi_ptr->uboot_partition_length);
                uboot_partition_display(uvi_ptr->env_partition_type, uvi_ptr->env_partition_offset,
                                        uvi_ptr->env_partition_length);
                uboot_partition_display(uvi_ptr->nfi_partition_type, uvi_ptr->nfi_partition_offset,
                                        uvi_ptr->nfi_partition_length);
                break;
            case EEPROM_RTM_MAC_ADDR_TYPE:

#ifdef CONFIG_OCTEON_TNPA5854
                printf("MAC Count : 0x%02x\n", ma_ptr->count);
                printf("MAC Base  : 0x%02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->fabric_int0[0],
                       ma_ptr->fabric_int0[1],
                       ma_ptr->fabric_int0[2],
                       ma_ptr->fabric_int0[3],
                       ma_ptr->fabric_int0[4],
                       ma_ptr->fabric_int0[5]);
#else

#ifdef CONFIG_OCTEON_TNPA5651X
                printf("MAC Count : 0x%02x\n", ma_ptr->count);
                printf("MAC Base  : 0x%02x:%02x:%02x:%02x:%02x:%02x\n",
                       ma_ptr->qlm1_port[0],
                       ma_ptr->qlm1_port[1],
                       ma_ptr->qlm1_port[2],
                       ma_ptr->qlm1_port[3],
                       ma_ptr->qlm1_port[4],
                       ma_ptr->qlm1_port[5]);

#else				
                printf("MAC base: %02x:%02x:%02x:%02x:%02x:%02x, count: %d\n",
                       ma_ptr->mac_addr_base[0],
                       ma_ptr->mac_addr_base[1],
                       ma_ptr->mac_addr_base[2],
                       ma_ptr->mac_addr_base[3],
                       ma_ptr->mac_addr_base[4],
                       ma_ptr->mac_addr_base[5],
                       ma_ptr->count);
#endif				
#endif
                break;
#endif /* CONFIG_OCTEON_TNPA3804 || CONFIG_OCTEON_AT5810 || CONFIG_OCTEON_TNPA5804 */

            default:
                    /* Default case handled outside of switch statement */
                break;

            }

            addr += len;
        }
        if (addr)
            printf("==========================================\n");

    } else if ((strncmp (argv[1], "set", strlen(argv[1])) == 0) && strlen(argv[2]) >= MIN_TLV_COMMAND_CHARS && argc > 3) {
        memset(eeprom_buf, 0, OCTEON_EEPROM_MAX_TUPLE_LENGTH);


        if (strncmp (argv[2], "clock", strlen(argv[2])) == 0 && argc == (3 + 4))
        {
            if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
            {
                printf("ERROR: this tuple type not supported on CN6XXX)\n");
                printf("       use the ddrclock tuple to set ddr frequency.\n");
                return(1);
            }

            printf("Setting clock descriptor...\n");
            tlv_hdr_ptr->type = EEPROM_CLOCK_DESC_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_clock_desc_t);
            tlv_hdr_ptr->checksum = 0; 
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_CLOCK_DESC_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_CLOCK_DESC_MINOR_VER;


            cd_ptr->ddr_clock_mhz  = simple_strtoul (argv[3], NULL, 0);
            cd_ptr->cpu_ref_clock_mhz_x_8  = simple_strtoul (argv[4], NULL, 0);
            cd_ptr->dfa_ref_clock_mhz_x_8  = simple_strtoul (argv[5], NULL, 0);
            cd_ptr->spi_clock_mhz  = simple_strtoul (argv[6], NULL, 0);

            printf("ddr: %d, cpu ref: %d, dfa ref: %d spi: %d\n", 
                   cd_ptr->ddr_clock_mhz, 
                   cd_ptr->cpu_ref_clock_mhz_x_8, 
                   cd_ptr->dfa_ref_clock_mhz_x_8, 
                   cd_ptr->spi_clock_mhz);


            if ((gd->board_desc.board_type == CVMX_BOARD_TYPE_EBT3000 && gd->mcu_rev_maj <= 2 && gd->mcu_rev_min <= 11)
#ifdef CONFIG_OCTEON_TNPA3804
                || (gd->board_desc.board_type == CVMX_BOARD_TYPE_TNPA3804 && gd->mcu_rev_maj <= 2 && gd->mcu_rev_min <= 11)
#endif /* CONFIG_OCTEON_TNPA3804 */

#ifdef CONFIG_OCTEON_AT5810
                || (gd->board_desc.board_type == CVMX_BOARD_TYPE_AT5810 && gd->mcu_rev_maj <= 2 && gd->mcu_rev_min <= 11)
#endif /* CONFIG_OCTEON_AT5810 */
#ifdef CONFIG_OCTEON_TNPA5804
                || (gd->board_desc.board_type == CVMX_BOARD_TYPE_TNPA5804 && gd->mcu_rev_maj <= 1 && gd->mcu_rev_min <= 1)
#endif /* CONFIG_OCTEON_TNPA5804 */
#ifdef CONFIG_OCTEON_W5800
                || (gd->board_desc.board_type == CVMX_BOARD_TYPE_W5800 && gd->mcu_rev_maj <= 1 && gd->mcu_rev_min <= 1)
#endif /* CONFIG_OCTEON_W5800 */
#ifdef CONFIG_OCTEON_WNPA3850
                || (gd->board_desc.board_type == CVMX_BOARD_TYPE_WNPA3850 && gd->mcu_rev_maj <= 2 && gd->mcu_rev_min <= 11)
#endif /* CONFIG_OCTEON_WNPA3850 */
#ifdef CONFIG_OCTEON_W3860
                || (gd->board_desc.board_type == CVMX_BOARD_TYPE_W3860 && gd->mcu_rev_maj <= 2 && gd->mcu_rev_min <= 11)
#endif /* CONFIG_OCTEON_W3860 */
                || (gd->board_desc.board_type == CVMX_BOARD_TYPE_EBH3000 && gd->mcu_rev_maj < 1 && gd->mcu_rev_min < 15))
            {
                /* MCU rev 2.11 and lower only understand rev 1 clock descriptors. */
#ifdef CONFIG_OCTEON_TNPA3804
                printf("Using version 1 clock descriptor for tnpa3804 board\n");
#elif CONFIG_OCTEON_W5800
                printf("Using version 1 clock descriptor for W5800 board\n");
#elif CONFIG_OCTEON_AT5810
                printf("Using version 1 clock descriptor for at5810 board\n");
#elif CONFIG_OCTEON_WNPA3850
                printf("Using version 1 clock descriptor for WNPA3850 board\n");
#elif CONFIG_OCTEON_W3860
                printf("Using version 1 clock descriptor for W3860 board\n");

#elif CONFIG_OCTEON_TNPA5804
                printf("Using version 1 clock descriptor for tnpa5804 board\n");
#else
                printf("Using version 1 clock descriptor for ebt3000 board\n");
#endif /* CONFIG_OCTEON_TNPA3804 */

                struct octeon_eeprom_clock_desc_v1 clock_v1;
                clock_v1.header.type = EEPROM_CLOCK_DESC_TYPE;
                clock_v1.header.major_version = 1;
                clock_v1.header.minor_version = 0;
                clock_v1.header.length = sizeof(clock_v1);
                clock_v1.ddr_clock_mhz = cd_ptr->ddr_clock_mhz;
                clock_v1.cpu_ref_clock_mhz_x_8 = cd_ptr->cpu_ref_clock_mhz_x_8;
                clock_v1.spi_clock_mhz = cd_ptr->spi_clock_mhz;
                write_tlv_tuple((octeon_eeprom_header_t *)&clock_v1);
            }
            else
            {
                write_tlv_tuple(tlv_hdr_ptr);
            }

        } 
        else if (strncmp (argv[2], "board", strlen(argv[2])) == 0 && argc == (3 + 4))
        {
            int i;

            // bd_type bd_rv_mj bd_rv_mn chip_type ch_rv_mj ch_rv_mn serial_str


            printf("Setting board descriptor...\n");
            tlv_hdr_ptr->type = EEPROM_BOARD_DESC_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_board_desc_t);
            tlv_hdr_ptr->checksum = 0; 
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_BOARD_DESC_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_BOARD_DESC_MINOR_VER;


            bd_ptr->board_type = 0;
#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL)|| defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)
            for (i = 1; i <CVMX_BOARD_TYPE_CUST_PRIVATE_MAX; i++)
#else
            for (i = 1; i <CVMX_BOARD_TYPE_MAX; i++)
#endif
            {
                if (!strnicmp(argv[3], cvmx_board_type_to_string(i), 100))
                {
                    bd_ptr->board_type = i;
                    break;
                }
            }
            if (!bd_ptr->board_type)
            {
                printf("ERROR: unrecognized board name: %s\n", argv[3]);
                return(0);
            }

            bd_ptr->rev_major      = simple_strtoul (argv[4], NULL, 0);
            bd_ptr->rev_minor      = simple_strtoul (argv[5], NULL, 0);
            memset(bd_ptr->serial_str, 0, OCTEON_SERIAL_LEN);
            strncpy((char *)bd_ptr->serial_str, argv[6], OCTEON_SERIAL_LEN);

            printf("Board type: %d, rev: %d.%d, serial: %s\n",
                   bd_ptr->board_type,    
                   bd_ptr->rev_major,     
                   bd_ptr->rev_minor,     
                   bd_ptr->serial_str);

            write_tlv_tuple(tlv_hdr_ptr);
        }
        else if (strncmp (argv[2], "capability", strlen(argv[2])) == 0 && argc <= (3 + 3))
        {
            printf("Setting chip capability descriptor...\n");
            tlv_hdr_ptr->type = EEPROM_CHIP_CAPABILITY_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_chip_capability_t);
            tlv_hdr_ptr->checksum = 0; 
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_CHIP_CAPABILITY_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_CHIP_CAPABILITY_MINOR_VER;

            cc_ptr->coremask     = simple_strtoul (argv[3], NULL, 16);

            cc_ptr->voltage_x100      = simple_strtoul (argv[4], NULL, 0);
            cc_ptr->cpu_freq_mhz      = simple_strtoul (argv[5], NULL, 0);

            write_tlv_tuple(tlv_hdr_ptr);

        }

#ifdef CONFIG_OCTEON_TNPA5854
        else if (strncmp (argv[2], "ncmac", strlen(argv[2])) == 0 && argc == (3 + 3))
        {
            int addr, mac_index, i;
            uint8_t mac_val[6];
            char *mac_entry = argv[4];
            char *end;

            mac_index = simple_strtoul (argv[3], NULL, 0);
            if (((mac_index < 0) || (mac_index > 9)) || (mac_entry == 0))
            {
                puts(cmdtp->help);
                return 1;
            }
        	for (i=0; i<6; i++) {
        		mac_val[i] = simple_strtoul(mac_entry, &end, 16);
        		if (mac_entry)
        			mac_entry = (*end) ? end+1 : end;
        	}
            printf("Setting non-contiguous mac address descriptor...\n");
            addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_MAC_ADDR_TYPE, 2, (uint8_t *)tlv_hdr_ptr, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
            if (addr < 0)
            {
                tlv_hdr_ptr->type = EEPROM_MAC_ADDR_TYPE;
                tlv_hdr_ptr->length = sizeof(octeon_eeprom_mac_addr_t);
                tlv_hdr_ptr->checksum = 0;
                tlv_hdr_ptr->major_version = OCTEON_EEPROM_MAC_ADDR_MAJOR_VER;
                tlv_hdr_ptr->minor_version = OCTEON_EEPROM_MAC_ADDR_MINOR_VER;
                ma_ptr->fabric_int0[0] = 0x00;
                ma_ptr->fabric_int0[1] = 0xDE;
                ma_ptr->fabric_int0[2] = 0xAD;
                ma_ptr->fabric_int0[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->fabric_int0[4] = gd->board_desc.serial_str[0];
                ma_ptr->fabric_int0[5] = 0x00;
                ma_ptr->fabric_int1[0] = 0x00;
                ma_ptr->fabric_int1[1] = 0xDE;
                ma_ptr->fabric_int1[2] = 0xAD;
                ma_ptr->fabric_int1[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->fabric_int1[4] = gd->board_desc.serial_str[0];
                ma_ptr->fabric_int1[5] = 0x01;
                ma_ptr->fabric_int2[0] = 0x00;
                ma_ptr->fabric_int2[1] = 0xDE;
                ma_ptr->fabric_int2[2] = 0xAD;
                ma_ptr->fabric_int2[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->fabric_int2[4] = gd->board_desc.serial_str[0];
                ma_ptr->fabric_int2[5] = 0x02;
                ma_ptr->fabric_int3[0] = 0x00;
                ma_ptr->fabric_int3[1] = 0xDE;
                ma_ptr->fabric_int3[2] = 0xAD;
                ma_ptr->fabric_int3[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->fabric_int3[4] = gd->board_desc.serial_str[0];
                ma_ptr->fabric_int3[5] = 0x03;
                ma_ptr->fp_int0[0] = 0x00;
                ma_ptr->fp_int0[1] = 0xDE;
                ma_ptr->fp_int0[2] = 0xAD;
                ma_ptr->fp_int0[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->fp_int0[4] = gd->board_desc.serial_str[0];
                ma_ptr->fp_int0[5] = 0x04;
                ma_ptr->fp_int1[0] = 0x00;
                ma_ptr->fp_int1[1] = 0xDE;
                ma_ptr->fp_int1[2] = 0xAD;
                ma_ptr->fp_int1[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->fp_int1[4] = gd->board_desc.serial_str[0];
                ma_ptr->fp_int1[5] = 0x05;
                ma_ptr->fp_int2[0] = 0x00;
                ma_ptr->fp_int2[1] = 0xDE;
                ma_ptr->fp_int2[2] = 0xAD;
                ma_ptr->fp_int2[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->fp_int2[4] = gd->board_desc.serial_str[0];
                ma_ptr->fp_int2[5] = 0x06;
                ma_ptr->fp_int3[0] = 0x00;
                ma_ptr->fp_int3[1] = 0xDE;
                ma_ptr->fp_int3[2] = 0xAD;
                ma_ptr->fp_int3[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->fp_int3[4] = gd->board_desc.serial_str[0];
                ma_ptr->fp_int3[5] = 0x07;
                ma_ptr->base_int0[0] = 0x00;
                ma_ptr->base_int0[1] = 0xDE;
                ma_ptr->base_int0[2] = 0xAD;
                ma_ptr->base_int0[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->base_int0[4] = gd->board_desc.serial_str[0];
                ma_ptr->base_int0[5] = 0x08;
                ma_ptr->base_int1[0] = 0x00;
                ma_ptr->base_int1[1] = 0xDE;
                ma_ptr->base_int1[2] = 0xAD;
                ma_ptr->base_int1[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->base_int1[4] = gd->board_desc.serial_str[0];
                ma_ptr->base_int1[5] = 0x09;
            }
            switch(mac_index)
            {
                case 0:
                    memcpy((void *)(ma_ptr->fabric_int0), (void *)(mac_val), 6);
                    break;
                case 1:
                    memcpy((void *)(ma_ptr->fabric_int1), (void *)(mac_val), 6);
                    break;
                case 2:
                    memcpy((void *)(ma_ptr->fabric_int2), (void *)(mac_val), 6);
                    break;
                case 3:
                    memcpy((void *)(ma_ptr->fabric_int3), (void *)(mac_val), 6);
                    break;
                case 4:
                    memcpy((void *)(ma_ptr->fp_int0), (void *)(mac_val), 6);
                    break;
                case 5:
                   memcpy((void *)(ma_ptr->fp_int1), (void *)(mac_val), 6);
                   break;
                case 6:
                    memcpy((void *)(ma_ptr->fp_int2), (void *)(mac_val), 6);
                    break;
                case 7:
                    memcpy((void *)(ma_ptr->fp_int3), (void *)(mac_val), 6);
                    break;
                case 8:
                    memcpy((void *)(ma_ptr->base_int0), (void *)(mac_val), 6);
                    break;
                case 9:
                    memcpy((void *)(ma_ptr->base_int1), (void *)(mac_val), 6);
                    break;
                default:
                    puts(cmdtp->help);
                    return 1;
                    break;
            }
            ma_ptr->count = simple_strtoul (argv[5], NULL, 0);
            printf("Setting mac count to: %d...\n", ma_ptr->count);
            write_tlv_tuple(tlv_hdr_ptr);
            /* update global data */
            memcpy((void *)(gd->mac_desc.fabric_int0), (void *)(ma_ptr->fabric_int0), 6);
            memcpy((void *)(gd->mac_desc.fabric_int1), (void *)(ma_ptr->fabric_int1), 6);
            memcpy((void *)(gd->mac_desc.fabric_int2), (void *)(ma_ptr->fabric_int2), 6);
            memcpy((void *)(gd->mac_desc.fabric_int3), (void *)(ma_ptr->fabric_int3), 6);
            memcpy((void *)(gd->mac_desc.fp_int0), (void *)(ma_ptr->fp_int0), 6);
            memcpy((void *)(gd->mac_desc.fp_int1), (void *)(ma_ptr->fp_int1), 6);
            memcpy((void *)(gd->mac_desc.fp_int2), (void *)(ma_ptr->fp_int2), 6);
            memcpy((void *)(gd->mac_desc.fp_int3), (void *)(ma_ptr->fp_int3), 6);
            memcpy((void *)(gd->mac_desc.base_int0), (void *)(ma_ptr->base_int0), 6);
            memcpy((void *)(gd->mac_desc.base_int1), (void *)(ma_ptr->base_int1), 6);
            /* update 82546 eeprom */
            do_inite1000eeprom ((cmd_tbl_t *)NULL, (int)NULL, (int)NULL, (char *)NULL);
            printf("MAC Address Change!... (RESET SYSTEM TO TAKE EFFECT)\n");
        }
#endif

#ifdef CONFIG_OCTEON_TNPA5651X
        else if (strncmp (argv[2], "ncmac", strlen(argv[2])) == 0 && argc == (3 + 3))
        {
            int addr, mac_index, i;
            uint8_t mac_val[6];
            char *mac_entry = argv[4];
            char *end;

            mac_index = simple_strtoul (argv[3], NULL, 0);
				/* if (((mac_index < 0) || (mac_index > 3)) || (mac_entry == 0)) */
            if ((mac_index < 0) || (mac_index > 3))				
            {
                puts(cmdtp->help);
                return 1;
            }
        	for (i=0; i<6; i++) {
        		mac_val[i] = simple_strtoul(mac_entry, &end, 16);
        		if (mac_entry)
        			mac_entry = (*end) ? end+1 : end;
        	}
            printf("Setting non-contiguous mac address descriptor...\n");
            addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_MAC_ADDR_TYPE, 3, (uint8_t *)tlv_hdr_ptr, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
            if (addr < 0)
            {
                tlv_hdr_ptr->type = EEPROM_MAC_ADDR_TYPE;
                tlv_hdr_ptr->length = sizeof(octeon_eeprom_mac_addr_t);
                tlv_hdr_ptr->checksum = 0;
                tlv_hdr_ptr->major_version = OCTEON_EEPROM_MAC_ADDR_MAJOR_VER;
                tlv_hdr_ptr->minor_version = OCTEON_EEPROM_MAC_ADDR_MINOR_VER;
                ma_ptr->qlm1_port[0] = 0x00;
                ma_ptr->qlm1_port[1] = 0xDE;
                ma_ptr->qlm1_port[2] = 0xAD;
                ma_ptr->qlm1_port[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->qlm1_port[4] = gd->board_desc.serial_str[0];
                ma_ptr->qlm1_port[5] = 0x00;
                ma_ptr->qlm3_port[0] = 0x00;
                ma_ptr->qlm3_port[1] = 0xDE;
                ma_ptr->qlm3_port[2] = 0xAD;
                ma_ptr->qlm3_port[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->qlm3_port[4] = gd->board_desc.serial_str[0];
                ma_ptr->qlm3_port[5] = 0x01;
                ma_ptr->amc_port0[0] = 0x00;
                ma_ptr->amc_port0[1] = 0xDE;
                ma_ptr->amc_port0[2] = 0xAD;
                ma_ptr->amc_port0[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->amc_port0[4] = gd->board_desc.serial_str[0];
                ma_ptr->amc_port0[5] = 0x02;
                ma_ptr->amc_port1[0] = 0x00;
                ma_ptr->amc_port1[1] = 0xDE;
                ma_ptr->amc_port1[2] = 0xAD;
                ma_ptr->amc_port1[3] = (gd->board_desc.rev_major<<4) | gd->board_desc.rev_minor;
                ma_ptr->amc_port1[4] = gd->board_desc.serial_str[0];
                ma_ptr->amc_port1[5] = 0x03;
            }
            switch(mac_index)
            {
                case 0:
                    memcpy((void *)(ma_ptr->qlm1_port), (void *)(mac_val), 6);
                    break;
                case 1:
                    memcpy((void *)(ma_ptr->qlm3_port), (void *)(mac_val), 6);
                    break;
                case 2:
                    memcpy((void *)(ma_ptr->amc_port0), (void *)(mac_val), 6);
                    break;
                case 3:
                    memcpy((void *)(ma_ptr->amc_port1), (void *)(mac_val), 6);
                    break;
                default:
                    puts(cmdtp->help);
                    return 1;
                    break;
            }
            ma_ptr->count = simple_strtoul (argv[5], NULL, 0);
            printf("Setting mac count to: %d...\n", ma_ptr->count);
            write_tlv_tuple(tlv_hdr_ptr);
            /* update global data */
            memcpy((void *)(gd->mac_desc.qlm1_port), (void *)(ma_ptr->qlm1_port), 6);
            memcpy((void *)(gd->mac_desc.qlm3_port), (void *)(ma_ptr->qlm3_port), 6);
            memcpy((void *)(gd->mac_desc.amc_port0), (void *)(ma_ptr->amc_port0), 6);
            memcpy((void *)(gd->mac_desc.amc_port1), (void *)(ma_ptr->amc_port1), 6);
            /* update 82546 eeprom */
#if 0			
            do_inite1000eeprom ((cmd_tbl_t *)NULL, (int)NULL, (int)NULL, (char *)NULL);
            printf("MAC Address Change!... (RESET SYSTEM TO TAKE EFFECT)\n");
#endif /* if 0 */			
        }
#endif



		
        else if (strncmp (argv[2], "mac", strlen(argv[2])) == 0 && argc == (3 + 2))
        {
            int i;
#if defined(CONFIG_OCTEON_TNPA5854) || defined(CONFIG_OCTEON_TNPA5651X)
            int mac_work;
#endif
            printf("Setting mac address descriptor...\n");
            tlv_hdr_ptr->type = EEPROM_MAC_ADDR_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_mac_addr_t);
            tlv_hdr_ptr->checksum = 0; 
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_MAC_ADDR_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_MAC_ADDR_MINOR_VER;

        	char *tmp = argv[3];
        	char *end;
        
#ifdef CONFIG_OCTEON_TNPA5854
        	for (i=0; i<6; i++) {
        		ma_ptr->fabric_int0[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
        		if (tmp)
        			tmp = (*end) ? end+1 : end;
        	}
            memcpy((void *)(ma_ptr->fabric_int1), (void *)(ma_ptr->fabric_int0), 6);
            memcpy((void *)(ma_ptr->fabric_int2), (void *)(ma_ptr->fabric_int0), 6);
            memcpy((void *)(ma_ptr->fabric_int3), (void *)(ma_ptr->fabric_int0), 6);
            memcpy((void *)(ma_ptr->fp_int0), (void *)(ma_ptr->fabric_int0), 6);
            memcpy((void *)(ma_ptr->fp_int1), (void *)(ma_ptr->fabric_int0), 6);
            memcpy((void *)(ma_ptr->fp_int2), (void *)(ma_ptr->fabric_int0), 6);
            memcpy((void *)(ma_ptr->fp_int3), (void *)(ma_ptr->fabric_int0), 6);
            memcpy((void *)(ma_ptr->base_int0), (void *)(ma_ptr->fabric_int0), 6);
            memcpy((void *)(ma_ptr->base_int1), (void *)(ma_ptr->fabric_int0), 6);
            mac_work = (ma_ptr->fabric_int0[2] << 24) | (ma_ptr->fabric_int0[3] << 16) |
                       (ma_ptr->fabric_int0[4] << 8) | (ma_ptr->fabric_int0[5] << 0);
            ++mac_work;
            ma_ptr->fabric_int1[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->fabric_int1[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->fabric_int1[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->fabric_int1[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->fabric_int2[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->fabric_int2[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->fabric_int2[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->fabric_int2[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->fabric_int3[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->fabric_int3[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->fabric_int3[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->fabric_int3[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->fp_int0[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->fp_int0[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->fp_int0[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->fp_int0[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->fp_int1[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->fp_int1[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->fp_int1[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->fp_int1[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->fp_int2[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->fp_int2[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->fp_int2[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->fp_int2[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->fp_int3[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->fp_int3[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->fp_int3[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->fp_int3[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->base_int0[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->base_int0[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->base_int0[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->base_int0[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->base_int1[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->base_int1[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->base_int1[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->base_int1[5] = (mac_work >> 0) & 0xFF;
#else

#ifdef CONFIG_OCTEON_TNPA5651X
			
        	for (i=0; i<6; i++) {
        		ma_ptr->qlm1_port[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
        		if (tmp)
        			tmp = (*end) ? end+1 : end;
        	}

            memcpy((void *)(ma_ptr->qlm3_port), (void *)(ma_ptr->qlm1_port), 6);
            memcpy((void *)(ma_ptr->amc_port0), (void *)(ma_ptr->qlm1_port), 6);
            memcpy((void *)(ma_ptr->amc_port1), (void *)(ma_ptr->qlm1_port), 6);
            mac_work = (ma_ptr->qlm1_port[2] << 24) | (ma_ptr->qlm1_port[3] << 16) |
                       (ma_ptr->qlm1_port[4] << 8) | (ma_ptr->qlm1_port[5] << 0);
            ++mac_work;
            ma_ptr->qlm3_port[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->qlm3_port[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->qlm3_port[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->qlm3_port[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->amc_port0[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->amc_port0[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->amc_port0[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->amc_port0[5] = (mac_work >> 0) & 0xFF;
            ++mac_work;
            ma_ptr->amc_port1[2] = (mac_work >> 24) & 0xFF;
            ma_ptr->amc_port1[3] = (mac_work >> 16) & 0xFF;
            ma_ptr->amc_port1[4] = (mac_work >> 8) & 0xFF;
            ma_ptr->amc_port1[5] = (mac_work >> 0) & 0xFF;
			
#else			
            for (i=0; i<6; i++)
            {
                ma_ptr->mac_addr_base[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
                if (tmp)
                    tmp = (*end) ? end+1 : end;
            }
#endif
			
#endif

            ma_ptr->count     = simple_strtoul (argv[4], NULL, 0);

            printf("Setting mac count to: %d\n", ma_ptr->count);

            write_tlv_tuple(tlv_hdr_ptr);

#if defined(CONFIG_OCTEON_TNPA3804) || defined(CONFIG_OCTEON_AT5810) || defined(CONFIG_OCTEON_TNPA5804)
            {
                /* update global data */

#ifdef CONFIG_OCTEON_TNPA5854
                memcpy((void *)(gd->mac_desc.fabric_int0), (void *)(ma_ptr->fabric_int0), 6);
                memcpy((void *)(gd->mac_desc.fabric_int1), (void *)(ma_ptr->fabric_int1), 6);
                memcpy((void *)(gd->mac_desc.fabric_int2), (void *)(ma_ptr->fabric_int2), 6);
                memcpy((void *)(gd->mac_desc.fabric_int3), (void *)(ma_ptr->fabric_int3), 6);
                memcpy((void *)(gd->mac_desc.fp_int0), (void *)(ma_ptr->fp_int0), 6);
                memcpy((void *)(gd->mac_desc.fp_int1), (void *)(ma_ptr->fp_int1), 6);
                memcpy((void *)(gd->mac_desc.fp_int2), (void *)(ma_ptr->fp_int2), 6);
                memcpy((void *)(gd->mac_desc.fp_int3), (void *)(ma_ptr->fp_int3), 6);
                memcpy((void *)(gd->mac_desc.base_int0), (void *)(ma_ptr->base_int0), 6);
                memcpy((void *)(gd->mac_desc.base_int1), (void *)(ma_ptr->base_int1), 6);
#else
                int ind;

                for (ind = 0; ind < 6; ind++)
                {
                    gd->mac_desc.mac_addr_base[ind] = ma_ptr->mac_addr_base[ind];
                }
#endif
                /* update 82546 eeprom */
                do_inite1000eeprom ((cmd_tbl_t *)NULL, (int)NULL, (int)NULL, (char *)NULL);
                printf("MAC Address Change!... (RESET SYSTEM TO TAKE EFFECT)\n");
            }
#endif

        }
        else if (strncmp (argv[2], "voltmult", 8) == 0 && argc == (3 + 2))
        {
            if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
            {
                printf("ERROR: this tuple type not supported on CN6XXX)\n");
                return(1);
            }
            tlv_hdr_ptr->type = EEPROM_VOLT_MULT_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_voltage_multiplier_t);
            tlv_hdr_ptr->checksum = 0; 
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_VOLT_MULT_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_VOLT_MULT_MINOR_VER;

            vm_ptr->voltage_millivolts     = simple_strtoul (argv[3], NULL, 0);
            vm_ptr->cpu_multiplier     = simple_strtoul (argv[4], NULL, 0);
            printf("Setting voltage to %d millivolts and cpu multiplier to %d\n",
                   vm_ptr->voltage_millivolts, vm_ptr->cpu_multiplier);
            write_tlv_tuple(tlv_hdr_ptr);
        }
        else if (strncmp (argv[2], "volt", 4) == 0 && argc == (3 + 1))
        {
            if (!OCTEON_IS_MODEL(OCTEON_CN6XXX))
            {
                printf("ERROR: this tuple type is only supported on CN6XXX)\n");
                return(1);
            }
            tlv_hdr_ptr->type = EEPROM_VOLTAGE_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_voltage_desc_t);
            tlv_hdr_ptr->checksum = 0; 
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_VOLTAGE_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_VOLTAGE_MINOR_VER;

            volt_ptr->octeon_core_voltage_mv = simple_strtoul (argv[3], NULL, 0);
            printf("Setting core voltage to %d millivolts\n", vm_ptr->voltage_millivolts);
            write_tlv_tuple(tlv_hdr_ptr);
        }
        else if (strncmp (argv[2], "mult", 4) == 0 && argc == (3 + 2))
        {
            if (!OCTEON_IS_MODEL(OCTEON_CN6XXX))
            {
                printf("ERROR: this tuple type is only supported on CN6XXX)\n");
                return(1);
            }
            tlv_hdr_ptr->type = EEPROM_MULTIPLIER_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_multiplier_desc_t);
            tlv_hdr_ptr->checksum = 0; 
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_MULTIPLIER_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_MULTIPLIER_MINOR_VER;

            mult_ptr->octeon_core_mult = simple_strtoul (argv[3], NULL, 0);
            mult_ptr->octeon_io_mult = simple_strtoul (argv[4], NULL, 0);
            printf("Setting core multiplier to: %d, and IO multiplier to: %d\n",
                   mult_ptr->octeon_core_mult, mult_ptr->octeon_io_mult);

            write_tlv_tuple(tlv_hdr_ptr);
        }
        else if (strncmp (argv[2], "ddrclock", 8) == 0 && argc == (3 + 1))
        {
            if (!OCTEON_IS_MODEL(OCTEON_CN6XXX))
            {
                printf("ERROR: this tuple type is only supported on CN6XXX)\n");
                return(1);
            }
            tlv_hdr_ptr->type = EEPROM_DDR_CLOCK_DESC_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_ddr_clock_desc_t);
            tlv_hdr_ptr->checksum = 0; 
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_DDR_CLOCK_DESC_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_DDR_CLOCK_DESC_MINOR_VER;

            ddr_clock_ptr->ddr_ref_hz = 0; /* Use default */
            ddr_clock_ptr->ddr_clock_hz = simple_strtoul (argv[3], NULL, 0);
            printf("Setting ddr clock to: %d Hz\n",
                   ddr_clock_ptr->ddr_clock_hz);

            write_tlv_tuple(tlv_hdr_ptr);
        }
#if defined(CONFIG_OCTEON_TNPA3804) || defined(CONFIG_OCTEON_AT5810) || defined(CONFIG_OCTEON_TNPA5804)
        else if (strncmp (argv[2], "rtmmac", strlen(argv[2])) == 0 && argc == (3 + 2))
        {
            int i;
            printf("Setting rtm mac address descriptor...\n");
            tlv_hdr_ptr->type = EEPROM_RTM_MAC_ADDR_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_mac_addr_t);
            tlv_hdr_ptr->checksum = 0;
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_MAC_ADDR_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_MAC_ADDR_MINOR_VER;

            char *tmp = argv[3];
            char *end;

            for (i=0; i<6; i++)
            {

#ifdef CONFIG_OCTEON_TNPA5854
        		ma_ptr->fabric_int0[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
#else
                ma_ptr->mac_addr_base[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
#endif
                if (tmp)
                    tmp = (*end) ? end+1 : end;
            }


            ma_ptr->count     = simple_strtoul (argv[4], NULL, 0);

            printf("Setting rtm mac count to: %d\n", ma_ptr->count);

            write_tlv_tuple(tlv_hdr_ptr);
        }
#endif

#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)
        /* Source IP Information (SIPI) */
        else if (strncmp (argv[2], "sipi", strlen(argv[2])) == 0 && argc == (3 + 7))
        {
            uint8_t id;

            printf("Setting source IP information (SIPI)...\n");
            id = simple_strtoul (argv[3], NULL, 0);
            if (id <= SIPI_ID_MAX)
            {
                switch (id)
                {
                case 0:
                    tlv_hdr_ptr->type = EEPROM_SIPI0_TYPE;
                    break;
                case 1:
                    tlv_hdr_ptr->type = EEPROM_SIPI1_TYPE;
                    break;
                case 2:
                    tlv_hdr_ptr->type = EEPROM_SIPI2_TYPE;
                    break;
                case 3:
                    tlv_hdr_ptr->type = EEPROM_SIPI3_TYPE;
                    break;
                case 4:
                    tlv_hdr_ptr->type = EEPROM_SIPI4_TYPE;
                    break;
                case 5:
                    tlv_hdr_ptr->type = EEPROM_SIPI5_TYPE;
                    break;
                case 6:
                    tlv_hdr_ptr->type = EEPROM_SIPI6_TYPE;
                    break;
                case 7:
                    tlv_hdr_ptr->type = EEPROM_SIPI7_TYPE;
                    break;
                case 8:
                    tlv_hdr_ptr->type = EEPROM_SIPI8_TYPE;
                    break;
                case 9:
                    tlv_hdr_ptr->type = EEPROM_SIPI9_TYPE;
                    break;
                }
                tlv_hdr_ptr->length = sizeof(octeon_eeprom_source_ip_info_t);
                tlv_hdr_ptr->checksum = 0;
                // SK: minor & major versions distinction is new in 1.7
                tlv_hdr_ptr->minor_version = OCTEON_EEPROM_SOURCE_IP_INFO_VER;
                tlv_hdr_ptr->major_version = 0;  

                memset(sipi_ptr->eth_port_id, 0, SIPI_ETH_PORT_ID_MAX_LEN);
                strncpy((char *)sipi_ptr->eth_port_id, argv[4], SIPI_ETH_PORT_ID_MAX_LEN);
                sipi_ptr->dhcp_enable = simple_strtoul (argv[5], NULL, 0);
                sipi_ptr->dhcp_num_retries = simple_strtoul (argv[6], NULL, 0);
                memset(sipi_ptr->ip_addr, 0, IP_ADDR_MAX_LEN);
                strncpy((char *)sipi_ptr->ip_addr, argv[7], IP_ADDR_MAX_LEN);
                memset(sipi_ptr->subnet_mask, 0, IP_ADDR_MAX_LEN);
                strncpy((char *)sipi_ptr->subnet_mask, argv[8], IP_ADDR_MAX_LEN);
                memset(sipi_ptr->default_gateway, 0, IP_ADDR_MAX_LEN);
                strncpy((char *)sipi_ptr->default_gateway, argv[9], IP_ADDR_MAX_LEN);
                write_tlv_tuple(tlv_hdr_ptr);
            }
        }
        /* Primary File Information (PFI) */
        else if (strncmp (argv[2], "pfi", strlen(argv[2])) == 0 && argc == (3 + 7))
        {
            uint8_t id;

            printf("Setting primary file information (PFI)...\n");
            id = simple_strtoul (argv[3], NULL, 0);
            if (id <= IMAGE_ID_MAX)
            {
                switch (id)
                {
                case 0:
                    tlv_hdr_ptr->type = EEPROM_PFI0_IMAGE_TYPE;
                    break;
                case 1:
                    tlv_hdr_ptr->type = EEPROM_PFI1_IMAGE_TYPE;
                    break;
                case 2:
                    tlv_hdr_ptr->type = EEPROM_PFI2_IMAGE_TYPE;
                    break;
                case 3:
                    tlv_hdr_ptr->type = EEPROM_PFI3_IMAGE_TYPE;
                    break;
                case 4:
                    tlv_hdr_ptr->type = EEPROM_PFI4_IMAGE_TYPE;
                    break;
                case 5:
                    tlv_hdr_ptr->type = EEPROM_PFI5_IMAGE_TYPE;
                    break;
                case 6:
                    tlv_hdr_ptr->type = EEPROM_PFI6_IMAGE_TYPE;
                    break;
                case 7:
                    tlv_hdr_ptr->type = EEPROM_PFI7_IMAGE_TYPE;
                    break;
                case 8:
                    tlv_hdr_ptr->type = EEPROM_PFI8_IMAGE_TYPE;
                    break;
                case 9:
                    tlv_hdr_ptr->type = EEPROM_PFI9_IMAGE_TYPE;
                    break;
                case 10:
                    tlv_hdr_ptr->type = EEPROM_PFI10_IMAGE_TYPE;
                    break;
                case 11:
                    tlv_hdr_ptr->type = EEPROM_PFI11_IMAGE_TYPE;
                    break;
                case 12:
                    tlv_hdr_ptr->type = EEPROM_PFI12_IMAGE_TYPE;
                    break;
                case 13:
                    tlv_hdr_ptr->type = EEPROM_PFI13_IMAGE_TYPE;
                    break;
                case 14:
                    tlv_hdr_ptr->type = EEPROM_PFI14_IMAGE_TYPE;
                    break;
                case 15:
                    tlv_hdr_ptr->type = EEPROM_PFI15_IMAGE_TYPE;
                    break;
                }
                tlv_hdr_ptr->length = sizeof(octeon_eeprom_file_info_t);
                tlv_hdr_ptr->checksum = 0;
                // SK: minor & major versions distinction is new in 1.7
                tlv_hdr_ptr->minor_version = OCTEON_EEPROM_FILE_INFO_VER;
                tlv_hdr_ptr->major_version = 0;  

                memset(fi_ptr->flash_file_location, 0, FI_FFL_MAX_LEN);
                strncpy((char *)fi_ptr->flash_file_location, argv[4], FI_FFL_MAX_LEN);
                memset(fi_ptr->flash_file_transfer_size, 0, FI_FFTS_MAX_LEN);
                strncpy((char *)fi_ptr->flash_file_transfer_size, argv[5], FI_FFTS_MAX_LEN);
                fi_ptr->sipi_id = simple_strtoul (argv[6], NULL, 0);
                memset(fi_ptr->tftp_file_name, 0, FI_FN_MAX_LEN);
                strncpy((char *)fi_ptr->tftp_file_name, argv[7], FI_FN_MAX_LEN);
                memset(fi_ptr->tftp_server, 0, IP_ADDR_MAX_LEN);
                strncpy((char *)fi_ptr->tftp_server, argv[8], IP_ADDR_MAX_LEN);
                fi_ptr->tftp_num_retries = simple_strtoul (argv[9], NULL, 0);
                write_tlv_tuple(tlv_hdr_ptr);
            }
        }
        /* Secondary File Information (SFI) */
        else if (strncmp (argv[2], "sfi", strlen(argv[2])) == 0 && argc == (3 + 7))
        {
            uint8_t id;

            printf("Setting secondary file information (SFI)...\n");
            id = simple_strtoul (argv[3], NULL, 0);
            if (id <= IMAGE_ID_MAX)
            {
                switch (id)
                {
                case 0:
                    tlv_hdr_ptr->type = EEPROM_SFI0_IMAGE_TYPE;
                    break;
                case 1:
                    tlv_hdr_ptr->type = EEPROM_SFI1_IMAGE_TYPE;
                    break;
                case 2:
                    tlv_hdr_ptr->type = EEPROM_SFI2_IMAGE_TYPE;
                    break;
                case 3:
                    tlv_hdr_ptr->type = EEPROM_SFI3_IMAGE_TYPE;
                    break;
                case 4:
                    tlv_hdr_ptr->type = EEPROM_SFI4_IMAGE_TYPE;
                    break;
                case 5:
                    tlv_hdr_ptr->type = EEPROM_SFI5_IMAGE_TYPE;
                    break;
                case 6:
                    tlv_hdr_ptr->type = EEPROM_SFI6_IMAGE_TYPE;
                    break;
                case 7:
                    tlv_hdr_ptr->type = EEPROM_SFI7_IMAGE_TYPE;
                    break;
                case 8:
                    tlv_hdr_ptr->type = EEPROM_SFI8_IMAGE_TYPE;
                    break;
                case 9:
                    tlv_hdr_ptr->type = EEPROM_SFI9_IMAGE_TYPE;
                    break;
                case 10:
                    tlv_hdr_ptr->type = EEPROM_SFI10_IMAGE_TYPE;
                    break;
                case 11:
                    tlv_hdr_ptr->type = EEPROM_SFI11_IMAGE_TYPE;
                    break;
                case 12:
                    tlv_hdr_ptr->type = EEPROM_SFI12_IMAGE_TYPE;
                    break;
                case 13:
                    tlv_hdr_ptr->type = EEPROM_SFI13_IMAGE_TYPE;
                    break;
                case 14:
                    tlv_hdr_ptr->type = EEPROM_SFI14_IMAGE_TYPE;
                    break;
                case 15:
                    tlv_hdr_ptr->type = EEPROM_SFI15_IMAGE_TYPE;
                    break;
                }
                tlv_hdr_ptr->length = sizeof(octeon_eeprom_file_info_t);
                tlv_hdr_ptr->checksum = 0;
                // SK: minor & major versions distinction is new in 1.7
                tlv_hdr_ptr->minor_version = OCTEON_EEPROM_FILE_INFO_VER;
                tlv_hdr_ptr->major_version = 0;

                memset(fi_ptr->flash_file_location, 0, FI_FFL_MAX_LEN);
                strncpy((char *)fi_ptr->flash_file_location, argv[4], FI_FFL_MAX_LEN);
                memset(fi_ptr->flash_file_transfer_size, 0, FI_FFTS_MAX_LEN);
                strncpy((char *)fi_ptr->flash_file_transfer_size, argv[5], FI_FFTS_MAX_LEN);
                fi_ptr->sipi_id = simple_strtoul (argv[6], NULL, 0);
                memset(fi_ptr->tftp_file_name, 0, FI_FN_MAX_LEN);
                strncpy((char *)fi_ptr->tftp_file_name, argv[7], FI_FN_MAX_LEN);
                memset(fi_ptr->tftp_server, 0, IP_ADDR_MAX_LEN);
                strncpy((char *)fi_ptr->tftp_server, argv[8], IP_ADDR_MAX_LEN);
                fi_ptr->tftp_num_retries = simple_strtoul (argv[9], NULL, 0);
                write_tlv_tuple(tlv_hdr_ptr);
            }
        }
        /* Load And Boot Information (LABI) */
        else if (strncmp (argv[2], "labi", strlen(argv[2])) == 0)
        {
            uint8_t id;
            uint16_t cmdArgInd, writeInd, readInd;

            printf("Setting load and boot information (LABI)...\n");
            id = simple_strtoul (argv[3], NULL, 0);
            if (id <= IMAGE_ID_MAX)
            {
                switch (id)
                {
                case 0:
                    tlv_hdr_ptr->type = EEPROM_LABI0_IMAGE_TYPE;
                    break;
                case 1:
                    tlv_hdr_ptr->type = EEPROM_LABI1_IMAGE_TYPE;
                    break;
                case 2:
                    tlv_hdr_ptr->type = EEPROM_LABI2_IMAGE_TYPE;
                    break;
                case 3:
                    tlv_hdr_ptr->type = EEPROM_LABI3_IMAGE_TYPE;
                    break;
                case 4:
                    tlv_hdr_ptr->type = EEPROM_LABI4_IMAGE_TYPE;
                    break;
                case 5:
                    tlv_hdr_ptr->type = EEPROM_LABI5_IMAGE_TYPE;
                    break;
                case 6:
                    tlv_hdr_ptr->type = EEPROM_LABI6_IMAGE_TYPE;
                    break;
                case 7:
                    tlv_hdr_ptr->type = EEPROM_LABI7_IMAGE_TYPE;
                    break;
                case 8:
                    tlv_hdr_ptr->type = EEPROM_LABI8_IMAGE_TYPE;
                    break;
                case 9:
                    tlv_hdr_ptr->type = EEPROM_LABI9_IMAGE_TYPE;
                    break;
                case 10:
                    tlv_hdr_ptr->type = EEPROM_LABI10_IMAGE_TYPE;
                    break;
                case 11:
                    tlv_hdr_ptr->type = EEPROM_LABI11_IMAGE_TYPE;
                    break;
                case 12:
                    tlv_hdr_ptr->type = EEPROM_LABI12_IMAGE_TYPE;
                    break;
                case 13:
                    tlv_hdr_ptr->type = EEPROM_LABI13_IMAGE_TYPE;
                    break;
                case 14:
                    tlv_hdr_ptr->type = EEPROM_LABI14_IMAGE_TYPE;
                    break;
                case 15:
                    tlv_hdr_ptr->type = EEPROM_LABI15_IMAGE_TYPE;
                    break;
                }
                tlv_hdr_ptr->length = sizeof(octeon_eeprom_load_and_boot_info_t);
                tlv_hdr_ptr->checksum = 0;
                // SK: minor & major versions distinction is new in 1.7
                tlv_hdr_ptr->minor_version = OCTEON_EEPROM_LOAD_AND_BOOT_INFO_VER;
                tlv_hdr_ptr->major_version = 0;
                strncpy((char *)labi_ptr->boot_command, argv[4], BOOT_COMMAND_MAX_LEN);
                strncpy((char *)labi_ptr->image_addr, argv[5], IMAGE_ADDR_MAX_LEN);
                for (cmdArgInd = 6, writeInd = 0; cmdArgInd < argc; cmdArgInd++)
                {
                    for (readInd = 0; (argv[cmdArgInd])[readInd] != '\0'; readInd++)
                    {
                        if (writeInd < (CMD_ARG_MAX_LEN - 1))
                        {
                            labi_ptr->cmd_arg[writeInd++] = (argv[cmdArgInd])[readInd];
                        }
                    }
                    if ((cmdArgInd != (argc - 1)) && ((writeInd < (CMD_ARG_MAX_LEN - 1))))
                    {
                        labi_ptr->cmd_arg[writeInd++] = ' ';
                    }
                }
                labi_ptr->cmd_arg[writeInd] = '\0';
                write_tlv_tuple(tlv_hdr_ptr);
            }
        }
        /* Script Active ID */
        else if (strncmp (argv[2], "scriptactive", strlen(argv[2])) == 0 && argc == (3 + 1))
        {
            printf("Setting script active...\n");
            tlv_hdr_ptr->type = EEPROM_SCRIPT_ID_ACTIVE_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_script_id_active_t);
            tlv_hdr_ptr->checksum = 0;
            // SK: distinction between major and minor version showed up in 1.7
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_SCRIPT_ID_ACTIVE_VER;
            tlv_hdr_ptr->major_version = 0;
            sia_ptr->id = simple_strtoul (argv[3], NULL, 0);
            write_tlv_tuple(tlv_hdr_ptr);
        }
        /* Script */
        else if (strncmp (argv[2], "script", strlen(argv[2])) == 0)
        {
            uint8_t newCmd;
            uint16_t id;
            uint16_t typeSeek;
            uint32_t argCount;
            uint32_t prevCmdsLen;
            uint32_t thisCmdLen;

            id = simple_strtoul (argv[3], NULL, 0);
            /* determine script ID */
            switch (id)
            {
            case 0:
                typeSeek = EEPROM_SCRIPT0_TYPE;
                break;
            case 1:
                typeSeek = EEPROM_SCRIPT1_TYPE;
                break;
            case 2:
                typeSeek = EEPROM_SCRIPT2_TYPE;
                break;
            case 3:
                typeSeek = EEPROM_SCRIPT3_TYPE;
                break;
            default:
                puts(cmdtp->help);
                return 1;
                break;
            }
            printf("Setting script...\n");
            /* check if script already exists - if so we'll just be appending command(s) */
            while ((len = octeon_tlv_eeprom_get_next_tuple(CFG_DEF_EEPROM_ADDR, addr, eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH)) > 0)
            {
                if (tlv_hdr_ptr->type == typeSeek)
                {
                    break;
                }
                else
                {
                    addr += len;
                }
            }
            if (len <= 0)
            {
                memset(eeprom_buf, 0, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
                tlv_hdr_ptr->type = typeSeek;
                tlv_hdr_ptr->length = sizeof(octeon_eeprom_script_t);
                tlv_hdr_ptr->checksum = 0;
                // SK: distinction between major and minor version showed up in 1.7
                tlv_hdr_ptr->minor_version = OCTEON_EEPROM_SCRIPT_VER;
                tlv_hdr_ptr->major_version = 0;
            }
            /* add new command(s) to script */
            prevCmdsLen = strlen((char *)s_ptr->script_data);
            if ((prevCmdsLen > 0) && (prevCmdsLen < SCRIPT_DATA_MAX_LEN))
            {
                s_ptr->script_data[prevCmdsLen] = '\n';
            }
            newCmd = 1;
            for (argCount = 4; argCount < argc; argCount++)
            {
                prevCmdsLen = strlen((char *)s_ptr->script_data);
                thisCmdLen = strlen(argv[argCount]);
                if ((thisCmdLen == 1) && (*(argv[argCount]) == '|'))
                {
                    if ((prevCmdsLen > 0) && (prevCmdsLen < SCRIPT_DATA_MAX_LEN))
                    {
                        s_ptr->script_data[prevCmdsLen] = '\n';
                    }
                    newCmd = 1;
                    continue;
                }
                if ((newCmd == 0) && (prevCmdsLen < SCRIPT_DATA_MAX_LEN))
                {
                    s_ptr->script_data[prevCmdsLen++] = ' ';
                }
                strncpy((char *)s_ptr->script_data + prevCmdsLen, argv[argCount], SCRIPT_DATA_MAX_LEN - prevCmdsLen);
                newCmd = 0;
            }
            write_tlv_tuple(tlv_hdr_ptr);
        }
        /* UART-Console Information (UARTCONI) */
        else if (strncmp (argv[2], "uartconi", strlen(argv[2])) == 0 && argc == (3 + 1))
        {
            printf("Setting UART-console information (UARTCONI)...\n");
            tlv_hdr_ptr->type = EEPROM_UARTCONI_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_uart_info_t);
            tlv_hdr_ptr->checksum = 0;
            // SK: minor and major versions showed up in 1.7
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_UART_INFO_VER;
            tlv_hdr_ptr->major_version = 0;

            memset(uart_ptr->baudrate, 0, BAUDRATE_MAX_LEN);
            strncpy((char *)uart_ptr->baudrate, argv[3], BAUDRATE_MAX_LEN);
            write_tlv_tuple(tlv_hdr_ptr);
        }
        /* UART-MMC Information (UARTMMCI) */
        else if (strncmp (argv[2], "uartmmci", strlen(argv[2])) == 0 && argc == (3 + 1))
        {
            printf("Setting UART-mmc information (UARTMMCI)...\n");
            tlv_hdr_ptr->type = EEPROM_UARTMMCI_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_uart_info_t);
            tlv_hdr_ptr->checksum = 0;
            // SK: major and minor versions showed up in 1.7
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_UART_INFO_VER;
            tlv_hdr_ptr->major_version = 0;

            memset(uart_ptr->baudrate, 0, BAUDRATE_MAX_LEN);
            strncpy((char *)uart_ptr->baudrate, argv[3], BAUDRATE_MAX_LEN);
            write_tlv_tuple(tlv_hdr_ptr);
        }
        /* POST Information-Checksum Test */
        else if (strncmp (argv[2], "csumtesti", strlen(argv[2])) == 0 && argc == (3 + 6))
        {
            uint8_t id;

            printf("Setting checksum test information (CSUMTESTI)...\n");
            id = simple_strtoul (argv[3], NULL, 0);
            if (id <= CSUMTEST_MAX)
            {
                switch (id)
                {
                case 0:
                    tlv_hdr_ptr->type = EEPROM_CSUMTESTI0_TYPE;
                    break;
                case 1:
                    tlv_hdr_ptr->type = EEPROM_CSUMTESTI1_TYPE;
                    break;
                case 2:
                    tlv_hdr_ptr->type = EEPROM_CSUMTESTI2_TYPE;
                    break;
                case 3:
                    tlv_hdr_ptr->type = EEPROM_CSUMTESTI3_TYPE;
                    break;
                }
                tlv_hdr_ptr->length = sizeof(octeon_eeprom_csumtest_info_t);
                tlv_hdr_ptr->checksum = 0;
                // SK: major and minor versions showed up in 1.7
                tlv_hdr_ptr->minor_version = OCTEON_EEPROM_CSUMTEST_INFO_VER;
                tlv_hdr_ptr->major_version = 0;

                csumtesti_ptr->start = simple_strtoul (argv[4], NULL, 16);
                csumtesti_ptr->end = simple_strtoul (argv[5], NULL, 16);
                csumtesti_ptr->csum_loc = simple_strtoul (argv[6], NULL, 16);
                csumtesti_ptr->algorithm = simple_strtoul (argv[7], NULL, 0);
                csumtesti_ptr->failure_action = simple_strtoul (argv[8], NULL, 0);
                write_tlv_tuple(tlv_hdr_ptr);
            }
        }
        /* POST Information-Memory Test */
        else if (strncmp (argv[2], "memtesti", strlen(argv[2])) == 0 && argc == (3 + 9))
        {
            uint8_t id;

            printf("Setting memory test information (MEMTESTI)...\n");
            id = simple_strtoul (argv[3], NULL, 0);
            if (id <= MEMTEST_MAX)
            {
                switch (id)
                {
                case 0:
                    tlv_hdr_ptr->type = EEPROM_MEMTESTI0_TYPE;
                    break;
                case 1:
                    tlv_hdr_ptr->type = EEPROM_MEMTESTI1_TYPE;
                    break;
                case 2:
                    tlv_hdr_ptr->type = EEPROM_MEMTESTI2_TYPE;
                    break;
                case 3:
                    tlv_hdr_ptr->type = EEPROM_MEMTESTI3_TYPE;
                    break;
                }
                tlv_hdr_ptr->length = sizeof(octeon_eeprom_memtest_info_t);
                tlv_hdr_ptr->checksum = 0;
                tlv_hdr_ptr->minor_version = OCTEON_EEPROM_MEMTEST_INFO_VER;
                tlv_hdr_ptr->major_version = 0;

                memtesti_ptr->start = simple_strtoull (argv[4], NULL, 16);
                memtesti_ptr->end = simple_strtoull (argv[5], NULL, 16);
                memtesti_ptr->pattern1 = simple_strtoull (argv[6], NULL, 16);
                memtesti_ptr->pattern2 = simple_strtoull (argv[7], NULL, 16);
                memtesti_ptr->step = simple_strtoul (argv[8], NULL, 16);
                memtesti_ptr->algorithm = simple_strtoul (argv[9], NULL, 0);
                memtesti_ptr->verbose = simple_strtoul (argv[10], NULL, 0);
                memtesti_ptr->failure_action = simple_strtoul (argv[11], NULL, 0);
                if (memtesti_ptr->step == 0)
                {
                    memtesti_ptr->step = 1;
                }
                write_tlv_tuple(tlv_hdr_ptr);

            }
        }
        /* POST Information-PHY Test */
        else if (strncmp (argv[2], "phytesti", strlen(argv[2])) == 0 && argc == (3 + 3))
        {
            printf("Setting PHY test information (PHYTESTI)...\n");
            tlv_hdr_ptr->type = EEPROM_PHYTESTI_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_phytest_info_t);
            tlv_hdr_ptr->checksum = 0;
            // SK: major and minor versions showed up in 1.7
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_PHYTEST_INFO_VER;
            tlv_hdr_ptr->major_version = 0;

            phytesti_ptr->algorithm = simple_strtoul (argv[3], NULL, 0);
            phytesti_ptr->dev_sel_map = simple_strtoul (argv[4], NULL, 16);
            phytesti_ptr->failure_action = simple_strtoul (argv[5], NULL, 0);
            write_tlv_tuple(tlv_hdr_ptr);
        }
        /* POST Information-PMEM Test */
        else if (strncmp (argv[2], "pmemtesti", strlen(argv[2])) == 0 && argc == (3 + 3))
        {
            printf("Setting PMEM test information (PMEMTESTI)...\n");
            tlv_hdr_ptr->type = EEPROM_PMEMTESTI_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_pmemtest_info_t);
            tlv_hdr_ptr->checksum = 0;
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_PMEMTEST_INFO_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_PMEMTEST_INFO_MINOR_VER;

            pmemtesti_ptr->algorithm = simple_strtoul (argv[3], NULL, 0);
            pmemtesti_ptr->verbose = simple_strtoul (argv[4], NULL, 0);
            pmemtesti_ptr->failure_action = simple_strtoul (argv[5], NULL, 0);
            write_tlv_tuple(tlv_hdr_ptr);
        }
        /* POST RLDRAM Test Information */
        else if (strncmp (argv[2], "rldramtesti", strlen(argv[2])) == 0 && argc == (3 + 4))
        {
            printf("Setting RLDRAM test information (RLDRAMTESTI)...\n");
            tlv_hdr_ptr->type = EEPROM_RLDRAM_TEST_TYPE;
            tlv_hdr_ptr->length = sizeof(octeon_eeprom_rldramtest_info_t);
            tlv_hdr_ptr->checksum = 0;
            tlv_hdr_ptr->major_version = OCTEON_EEPROM_RLDRAMTEST_INFO_MAJOR_VER;
            tlv_hdr_ptr->minor_version = OCTEON_EEPROM_RLDRAMTEST_INFO_MINOR_VER;

            rldramtesti_ptr->addr = simple_strtoul (argv[3], NULL, 0);
            rldramtesti_ptr->size = simple_strtoul (argv[4], NULL, 0);
            rldramtesti_ptr->replType = simple_strtoul (argv[5], NULL, 0);
            rldramtesti_ptr->display = simple_strtoul (argv[6], NULL, 0);
            write_tlv_tuple(tlv_hdr_ptr);
        }


#endif /* CONFIG_OCTEON_TNPA3804 || CONFIG_OCTEON_AT5810 || CONFIG_OCTEON_TNPA5804 */
        else
        {
            puts(cmdtp->help);
            return 1;

        }



    }
    else
    {
        puts(cmdtp->help);
        return 1;

    }

    return(0);
}

#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)
void eeprom_script_run(void)
{
    uint16_t eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *eeprom_buf = (void *)eeprom_buf16;
    octeon_eeprom_script_id_active_t *sia_ptr = (void *)eeprom_buf;
    octeon_eeprom_script_t *s_ptr = (void *)eeprom_buf;
    uint16_t type_seek;
    uint16_t script_ind;
    uint16_t cmd_ind;
    uint8_t script_cmd[OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1];
    int addr;
    int run_result;

    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_SCRIPT_ID_ACTIVE_TYPE, 0, eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr < 0)
    {
        printf("Active Script ID Is Not Configured\n");
        return;
    }
    switch (sia_ptr->id)
    {
    case 0:
        type_seek = EEPROM_SCRIPT0_TYPE;
        break;
    case 1:
        type_seek = EEPROM_SCRIPT1_TYPE;
        break;
    case 2:
        type_seek = EEPROM_SCRIPT2_TYPE;
        break;
    case 3:
        type_seek = EEPROM_SCRIPT3_TYPE;
        break;
    default:
        printf("Active Script ID %d Is Invalid\n", sia_ptr->id);
        return;
        break;
    }
    printf("Active Script ID %d Is Configured\n", sia_ptr->id);
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, type_seek, 0, eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr < 0)
    {
        printf("Active Script Is Not Configured\n");
        return;
    }
    printf("Active Script Is Configured\n");
    printf("Active Script Is Executing...\n");
    script_ind = 0;
    cmd_ind = 0;
    do
    {
        if ((s_ptr->script_data[script_ind] == '\n') || (s_ptr->script_data[script_ind] == '\0'))
        {
            if (cmd_ind > 0)
            {
                script_cmd[cmd_ind] = '\0';
                printf("%s\n", script_cmd);
                run_result = run_command((char *)script_cmd, 0);
                if (run_result < 0)
                {
                    /* terminate with error */
                    printf("Active Script Terminated With Error\n");
                    return;
                }
                else if (run_result == 0)
                {
                    if (had_ctrlc ())
                    {
                        /* terminate with abort */
                        printf("Active Script Aborted By User\n");
                        return;
                    }
                }
                cmd_ind = 0;
            }
        }
        else
        {
            script_cmd[cmd_ind++] = s_ptr->script_data[script_ind];
        }
    }
    while (s_ptr->script_data[script_ind++] != '\0');
    printf("Active Script Execution Completed\n");
}

static int sipi_dhcp_num_retries = -1;
static int sipi_dhcp_error = -1;
static int pfi_sfi_tftp_num_retries = -1;
static int pfi_sfi_tftp_error = -1;
static int pfi_sfi_labi_sipi_id_previous = -1;

int eeprom_sipi_run(int id)
{
    uint16_t eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *eeprom_buf = (void *)eeprom_buf16;
    octeon_eeprom_source_ip_info_t *sipi_ptr = (void *)eeprom_buf;
    uint8_t sipi_cmd[OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1];
    uint16_t sipi_id;
    int addr;
    int run_result;

    switch (id)
    {
    case 0:
        sipi_id = EEPROM_SIPI0_TYPE;
        break;
    case 1:
        sipi_id = EEPROM_SIPI1_TYPE;
        break;
    case 2:
        sipi_id = EEPROM_SIPI2_TYPE;
        break;
    case 3:
        sipi_id = EEPROM_SIPI3_TYPE;
        break;
    case 4:
        sipi_id = EEPROM_SIPI4_TYPE;
        break;
    case 5:
        sipi_id = EEPROM_SIPI5_TYPE;
        break;
    case 6:
        sipi_id = EEPROM_SIPI6_TYPE;
        break;
    case 7:
        sipi_id = EEPROM_SIPI7_TYPE;
        break;
    case 8:
        sipi_id = EEPROM_SIPI8_TYPE;
        break;
    case 9:
        sipi_id = EEPROM_SIPI9_TYPE;
        break;
    default:
        printf ("SIPI ID %d Is Out Of Range\n", id);
        return(-1);
    }

    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, sipi_id, 0, eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr < 0)
    {
        printf("SIPI%d Is Not Configured\n", id);
        return(-1);
    }
    printf("SIPI%d Processing Started\n", id);
    if (sipi_ptr->eth_port_id[0] != '-')
    {
        memcpy (sipi_cmd, SIPI_SETENV_ETHACT_CMD, strlen(SIPI_SETENV_ETHACT_CMD) + 1);
        memcpy (&sipi_cmd[strlen(SIPI_SETENV_ETHACT_CMD)], sipi_ptr->eth_port_id, SIPI_ETH_PORT_ID_MAX_LEN + 1);
        printf("%s\n", sipi_cmd);
        run_result = run_command((char *)&sipi_cmd[0], 0);
        if (run_result < 0)
        {
            /* terminate with error */
            printf("SIPI%d Processing Terminated With Ethernet Port Id Error\n", id);
            return(-1);
        }
    }
    /* dhcp_enable : 0 => all static */
    /*               1 => DHCP with static override */
    /*               2 => DHCP with static override only if DHCP failure */
    if (sipi_ptr->dhcp_enable)
    {
        sipi_dhcp_num_retries = sipi_ptr->dhcp_num_retries;
        memcpy (sipi_cmd, SIPI_DHCP_CMD, strlen(SIPI_DHCP_CMD) + 1);
        printf("%s\n", sipi_cmd);
        run_result = run_command((char *)sipi_cmd, 0);
        if (run_result < 0)
        {
            /* terminate with error */
            printf("SIPI%d Processing Terminated With DHCP Error\n, id");
            return(-1);
        }
    }
    if ((sipi_ptr->dhcp_enable != 2) || (sipi_dhcp_error == 1))
    {
        if (sipi_ptr->ip_addr[0] != '-')
        {
            memcpy (sipi_cmd, SIPI_SETENV_IPADDR_CMD, strlen(SIPI_SETENV_IPADDR_CMD) + 1);
            memcpy (&sipi_cmd[strlen(SIPI_SETENV_IPADDR_CMD)], sipi_ptr->ip_addr, IP_ADDR_MAX_LEN + 1);
            printf("%s\n", sipi_cmd);
            run_result = run_command((char *)sipi_cmd, 0);
            if (run_result < 0)
            {
                /* terminate with error */
                printf("SIPI%d Processing Terminated With IP Address Error\n", id);
                return(-1);
            }
            /* reset any DHCP error because of static override */
            sipi_dhcp_error = 0;
        }
        if (sipi_ptr->subnet_mask[0] != '-')
        {
            memcpy (sipi_cmd, SIPI_SETENV_NETMASK_CMD, strlen(SIPI_SETENV_NETMASK_CMD) + 1);
            memcpy (&sipi_cmd[strlen(SIPI_SETENV_NETMASK_CMD)], sipi_ptr->subnet_mask, IP_ADDR_MAX_LEN + 1);
            printf("%s\n", sipi_cmd);
            run_result = run_command((char *)sipi_cmd, 0);
            if (run_result < 0)
            {
                /* terminate with error */
                printf("SIPI%d Processing Terminated With Subnet Mask Error\n", id);
                return(-1);
            }
        }
        if (sipi_ptr->default_gateway[0] != '-')
        {
            memcpy (sipi_cmd, SIPI_SETENV_GATEWAYIP_CMD, strlen(SIPI_SETENV_GATEWAYIP_CMD) + 1);
            memcpy (&sipi_cmd[strlen(SIPI_SETENV_GATEWAYIP_CMD)], sipi_ptr->default_gateway, IP_ADDR_MAX_LEN + 1);
            printf("%s\n", sipi_cmd);
            run_result = run_command((char *)sipi_cmd, 0);
            if (run_result < 0)
            {
                /* terminate with error */
                printf("SIPI%d Processing Terminated With Default Gateway Error\n", id);
                return(-1);
            }
        }
    }
    if ((sipi_ptr->dhcp_enable == 0) && (sipi_ptr->ip_addr[0] == '-'))
    {
        sipi_dhcp_error = 1;
        printf("SIPI%d Unsuccessful Without IP Address Assignment\n", id);
        return(0);
    }
    else if (sipi_dhcp_error == 1)
    {
        printf("SIPI%d Unsuccessful Without DHCP Server Communication\n", id);
        return(0);
    }
    else
    {
        printf("SIPI%d Processing Completed\n", id);
        return(1);
    }
}

int file_load (uint16_t f_id, octeon_eeprom_file_info_t *fi_ptr, octeon_eeprom_load_and_boot_info_t *labi_ptr)
{
    uint8_t cmd[OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1];
    int run_result;
    int addr;
    int sipi_result;

    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, f_id, 0, (void *)fi_ptr, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr < 0)
    {
        pfi_sfi_tftp_error = 1;
        return(0);
    }
    if (fi_ptr->flash_file_location[0] == '-')
    {
        /* TFTP Based */
        if (pfi_sfi_labi_sipi_id_previous != fi_ptr->sipi_id)
        {
            /* perform source IP information processing */
            sipi_result = eeprom_sipi_run(fi_ptr->sipi_id);
            if (sipi_result < 0)
            {
                /* terminate with error */
                printf("PFI/SFI/LABI Processing Terminated With SIPI Error\n");
                return(-1);
            }
            else if (sipi_dhcp_error == 1)
            {
                return(1);
            }
            pfi_sfi_labi_sipi_id_previous = fi_ptr->sipi_id;
        }
        if (fi_ptr->tftp_server[0] != '-')
        {
            memcpy (cmd, FI_SETENV_SERVERIP_CMD, strlen(FI_SETENV_SERVERIP_CMD) + 1);
            memcpy (&cmd[strlen(FI_SETENV_SERVERIP_CMD)], fi_ptr->tftp_server, IP_ADDR_MAX_LEN + 1);
            printf("%s\n", cmd);
            run_result = run_command((char *)cmd, 0);
            if (run_result < 0)
            {
                /* terminate with error */
                printf("PFI/SFI/LABI Processing Terminated With TFTP Server Error\n");
                return(-1);
            }
        }
        memset (cmd, 0, OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1);
        memcpy (cmd, FI_TFTPBOOT_CMD, strlen(FI_TFTPBOOT_CMD) + 1);
        memcpy (&cmd[strlen((char *)cmd)], labi_ptr->image_addr, IMAGE_ADDR_MAX_LEN + 1);
        memcpy (&cmd[strlen((char *)cmd)], " ", strlen(" ") + 1);
        memcpy (&cmd[strlen((char *)cmd)], fi_ptr->tftp_file_name, FI_FN_MAX_LEN + 1);
        printf("%s\n", cmd);
        pfi_sfi_tftp_num_retries = fi_ptr->tftp_num_retries;
        run_result = run_command((char *)cmd, 0);
        if (run_result <= 0)
        {
            /* terminate with error */
            printf("PFI/SFI/LABI Processing Terminated With TFTP Boot Error\n");
            return(-1);
        }
    }
    else
    {
        /* FLASH Based */
        if (fi_ptr->flash_file_transfer_size[0] != '-')
        {
            memset (cmd, 0, OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1);
            memcpy (cmd, FI_CPB_CMD, strlen(FI_CPB_CMD) + 1);
            memcpy (&cmd[strlen((char *)cmd)], fi_ptr->flash_file_location, FI_FFL_MAX_LEN + 1);
            memcpy (&cmd[strlen((char *)cmd)], " ", strlen(" ") + 1);
            memcpy (&cmd[strlen((char *)cmd)], labi_ptr->image_addr, IMAGE_ADDR_MAX_LEN + 1);
            memcpy (&cmd[strlen((char *)cmd)], " ", strlen(" ") + 1);
            memcpy (&cmd[strlen((char *)cmd)], fi_ptr->flash_file_transfer_size, FI_FFTS_MAX_LEN + 1);
            printf("%s\n", cmd);
            run_result = run_command((char *)cmd, 0);
            if (run_result <= 0)
            {
                /* terminate with error */
                printf("PFI/SFI/LABI Processing Terminated With Copy Error\n");
                return(-1);
            }
        }
    }
    return(1);
}

void setMdioNamedAlloc(void)
{
	char *name_mdio = "namedalloc mdio_global_lock 8";
	char *wr_name_val = "write64 $(named_block_addr) 0x00000000";
	char *str;

    if( NULL == (str = getenv("mdio_alloc")))
		return;
    
	if( strcmp(str, "yes" ) == 0 ) 
    {
        run_command(name_mdio, 0);
        run_command(wr_name_val, 0);
    }
}

#ifdef CONFIG_OCTEON_TNPA5854
void setMACNonContiguousNamedAlloc(void)
{
    DECLARE_GLOBAL_DATA_PTR;
    char *name_ncmac_block = "namedalloc ncmac_block 64";
    char *str;
    uint8_t *alloc_ptr;
    int ind;

    if( NULL == (str = getenv("ncmac_alloc")))
    {
        return;
    }
    if( strcmp(str, "yes" ) == 0 )
    {
        /* allocate memory containing MAC addresses for linux / application access */
        run_command(name_ncmac_block, 0);
        str = getenv("named_block_addr");
        if (str == NULL)
        {
            printf("\nError acquiring named_block_addr!\n");
            return;
        }
        alloc_ptr = (uint8_t *)simple_strtoul(str, NULL, 16);
        /* initialize memory containing MAC addresses for linux / application access */
        printf("Writing MAC addresses to addr: 0x%qx\n", alloc_ptr);
        for (ind = 0; ind < BOARD_MMC_AMC_MAC_SIZE; ind++)
        {
            alloc_ptr[ind] = gd->mac_desc.fabric_int0[ind];
		}
    }
}
#endif


#ifdef CONFIG_OCTEON_TNPA5651X

/* This function is called only once - after all MAC addrs
   have been stored in the local struct, so it can then be
   copied into the namedalloc space.
*/

void setMACNonContiguousNamedAlloc(void)
{
    DECLARE_GLOBAL_DATA_PTR;
    char *name_ncmac_block = "namedalloc ncmac_block 64";
    char *str;
    uint8_t *alloc_ptr;
    int ind;
	
    if( NULL == (str = getenv("ncmac_alloc")))
    {
        return;
    }
	
    if( strcmp(str, "yes" ) == 0 )
    {
        /* allocate memory containing MAC addresses for linux / application access */
        run_command(name_ncmac_block, 0);
        str = getenv("named_block_addr");
        if (str == NULL)
        {
            printf("\nError acquiring named_block_addr!\n");
            return;
        }
        alloc_ptr = (uint8_t *)simple_strtoul(str, NULL, 16);
        /* initialize memory containing MAC addresses for linux / application access */
        printf("Writing MAC addresses to addr: 0x%qx\n", alloc_ptr);

		for (ind = 0; ind < 6; ind++) {
			alloc_ptr[ind] = gd->mac_desc.qlm1_port[ind];
		}

		for (ind = 0; ind < 6; ind++) {
			alloc_ptr[ind + 24] = gd->mac_desc.qlm3_port[ind];
		}

		for (ind = 0; ind < 6; ind++) {
			alloc_ptr[ind + 48] = gd->mac_desc.amc_port0[ind];
		}

		for (ind = 0; ind < 6; ind++) {
			alloc_ptr[ind + 54] = gd->mac_desc.amc_port1[ind];
		}
			
    }
	
}

#endif


void eeprom_swfb_run(void)
{
    char *s1, *s2, *s3;
    uint8_t cmd1[SWFB_COMMAND_MAX + 1];
    uint8_t cmd2[SWFB_COMMAND_MAX + 1];
    int run_result;

#ifdef CONFIG_OCTEON_AT5810
    if ((s1 = getenv("swfb_active")) == NULL)
    {
        /* application FLASH booting is disabled */
        return;
    }
    else
    {
        if (strcmp(s1, "yes") != 0)
        {
            /* application FLASH booting is disabled */
            return;
        }
    }
#elif !defined(CONFIG_OCTEON_56x4) && !defined(CONFIG_OCTEON_5651x)
    if (((*BOARD_ID_DIPSWITCH_REG) & 0x10) != 0)
    {
        /* Switch / FLASH Boot disabled (DIP Switch 4) */
        return;
    }
#elif defined(CONFIG_OCTEON_5651x)

	/* check if switch segment 3 on switch 3 is On.  If not then don't boot
       the kernel from FLASH. */
	if (((*BOARD_ID_DIPSWITCH_REG) & 0x04) != 0)

    {
        /* Switch 3 / FLASH Boot disabled (DIP Switch 3)(bit 2) */
        return;
    }

#endif

    if (ctrlc())
    {
        printf("SWFB Aborted By User\n");
        return;
    }
    if ((s1 = getenv("swfb_cmd")) == NULL)
    {
        printf("SWFB Failure - No Command Defined (swfb_cmd)\n");
        return;
    }
    memset (cmd1, 0, SWFB_COMMAND_MAX + 1);
    if ((strlen((char *)cmd1) + strlen((char *)s1) + 1) > SWFB_COMMAND_MAX)
    {
        printf("SWFB Failure - Command String Exceeds %d (1)\n", SWFB_COMMAND_MAX);
        return;
    }
    memcpy (&cmd1[strlen((char *)cmd1)], s1, strlen(s1));
    memcpy (&cmd1[strlen((char *)cmd1)], " ", strlen(" "));
    if ((s1 = getenv("swfb_flash_addr")) == NULL)
    {
        printf("SWFB Failure - No Flash Address Defined (swfb_flash_addr)\n");
        return;
    }
    if ((s2 = getenv("swfb_ram_addr")) != NULL)
    {
        memset (cmd2, 0, SWFB_COMMAND_MAX + 1);
        memcpy (cmd2, FI_CPB_CMD, strlen(FI_CPB_CMD));
        if ((strlen((char *)cmd2) + strlen(s1) + 1) > SWFB_COMMAND_MAX)
        {
            printf("SWFB Failure - Command String Exceeds %d (2)\n", SWFB_COMMAND_MAX);
            return;
        }
        memcpy (&cmd2[strlen((char *)cmd2)], s1, strlen(s1));
        memcpy (&cmd2[strlen((char *)cmd2)], " ", strlen(" "));
        if ((strlen((char *)cmd2) + strlen(s2) + 1) > SWFB_COMMAND_MAX)
        {
            printf("SWFB Failure - Command String Exceeds %d (3)\n", SWFB_COMMAND_MAX);
            return;
        }
        memcpy (&cmd2[strlen((char *)cmd2)], s2, strlen(s2));
        memcpy (&cmd2[strlen((char *)cmd2)], " ", strlen(" "));
        /* obtain image size */
        if ((s3 = getenv("swfb_image_size")) != NULL)
        {
            if ((strlen((char *)cmd2) + strlen(s3)) > SWFB_COMMAND_MAX)
            {
                printf("SWFB Failure - Command String Exceeds %d (4)\n", SWFB_COMMAND_MAX);
                return;
            }
            memcpy (&cmd2[strlen((char *)cmd2)], s3, strlen(s3));
        }
        else
        {
            if ((strlen((char *)cmd2) + strlen("1000000")) > SWFB_COMMAND_MAX)
            {
                printf("SWFB Failure - Command String Exceeds %d (5)\n", SWFB_COMMAND_MAX);
                return;
            }
            memcpy (&cmd2[strlen((char *)cmd2)], "1000000", strlen("1000000"));
        }
        printf("SWFB:%s\n", cmd2);
        run_result = run_command((char *)cmd2, 0);
        if (run_result <= 0)
        {
            printf("SWFB Failure - Copy Error\n");
            return;
        }
        /* append the image location - RAM address */
        if ((strlen((char *)cmd1) + strlen(s2) + 1) > SWFB_COMMAND_MAX)
        {
            printf("SWFB Failure - Command String Exceeds %d (6)\n", SWFB_COMMAND_MAX);
            return;
        }
        memcpy (&cmd1[strlen((char *)cmd1)], s2, strlen(s2));
        memcpy (&cmd1[strlen((char *)cmd1)], " ", strlen(" "));
    }
    else
    {
        /* append the image location - FLASH address */
        if ((strlen((char *)cmd1) + strlen(s1) + 1) > SWFB_COMMAND_MAX)
        {
            printf("SWFB Failure - Command String Exceeds %d (7)\n", SWFB_COMMAND_MAX);
            return;
        }
        memcpy (&cmd1[strlen((char *)cmd1)], s1, strlen(s1));
        memcpy (&cmd1[strlen((char *)cmd1)], " ", strlen(" "));
    }
    if ((s1 = getenv("swfb_cmd_arg")) != NULL)
    {
        /* append the arguments */
        if ((strlen((char *)cmd1) + strlen(s1)) > SWFB_COMMAND_MAX)
        {
            printf("SWFB Failure - Command String Exceeds %d (8)\n", SWFB_COMMAND_MAX);
            return;
        }
        memcpy (&cmd1[strlen((char *)cmd1)], s1, strlen(s1));
    }
    /* issue the command */
    printf("SWFB:%s\n", cmd1);
    run_command((char *)cmd1, 0);
}

void eeprom_pfi_sfi_labi_run(void)
{
    uint16_t fi_eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *fi_eeprom_buf = (void *)fi_eeprom_buf16;
    octeon_eeprom_file_info_t *fi_ptr = (void *)fi_eeprom_buf;
    uint16_t labi_eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *labi_eeprom_buf = (void *)labi_eeprom_buf16;
    octeon_eeprom_load_and_boot_info_t *labi_ptr = (void *)labi_eeprom_buf;
    uint8_t cmd[OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1];
    char *s;
    uint16_t pfi_id, sfi_id, labi_id;
    uint16_t tuple_ind;
    int addr;
    int load_result;
    int run_result;

    if (((s = getenv("autoload")) != NULL) && (*s != 'n'))
    {
        if (((s = getenv("autoscript")) != NULL) && (*s != 'n'))
        {
            printf("Auto-Scripting Started\n");
            memset (cmd, 0, OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1);
            memcpy (cmd, "dhcp", strlen("dhcp") + 1);
            printf("%s\n", cmd);
            autoscript_enable = 1;
            run_result = run_command((char *)cmd, 0);
            autoscript_enable = 0;
            if (run_result == 1)
            {
                printf("Auto-Scripting Completed\n");
            }
            else
            {
                printf("Auto-Scripting Unsuccessful\n");
            }
        }
    }
    printf("PFI/SFI/LABI Processing Started\n");
    tuple_ind = 0;
    for (pfi_id = EEPROM_PFI0_IMAGE_TYPE, sfi_id = EEPROM_SFI0_IMAGE_TYPE, labi_id = EEPROM_LABI0_IMAGE_TYPE;
        pfi_id <= EEPROM_PFI15_IMAGE_TYPE;
        ++pfi_id, ++sfi_id, ++labi_id, ++tuple_ind)
    {
        if (ctrlc())
        {
            puts ("\nAbort\n");
            return;
        }
        /* attempt LABI tuple search */
        addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, labi_id, 0, labi_eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
        if (addr < 0)
        {
/*            printf("LABI%d Is Not Configured\n", tuple_ind); */
            continue;
        }
        sipi_dhcp_error = 0;
        pfi_sfi_tftp_error = 0;
        printf("PFI%d Attempt...\n", tuple_ind);
        load_result = file_load(pfi_id, fi_ptr, labi_ptr);
        if (load_result < 0)
        {
            /* fatal error */
            sipi_dhcp_num_retries = -1;
            sipi_dhcp_error = -1;
            pfi_sfi_tftp_num_retries = -1;
            pfi_sfi_tftp_error = -1;
            return;
        }
        else if ((sipi_dhcp_error == 1) || (pfi_sfi_tftp_error == 1))
        {
            /* SFI attempt */
            sipi_dhcp_error = 0;
            pfi_sfi_tftp_error = 0;
            printf("SFI%d Attempt...\n", tuple_ind);
            load_result = file_load(sfi_id, fi_ptr, labi_ptr);
            if (load_result < 0)
            {
                /* fatal error */
                sipi_dhcp_num_retries = -1;
                sipi_dhcp_error = -1;
                pfi_sfi_tftp_num_retries = -1;
                pfi_sfi_tftp_error = -1;
                return;
            }
            else if ((sipi_dhcp_error == 1) || (pfi_sfi_tftp_error == 1))
            {
                /* primary and secondary invalid */
                printf ("PFI%d And SFI%d Unsuccessful\n", tuple_ind, tuple_ind);
                continue;
            }
        }
        memset (cmd, 0, OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1);
        memcpy (cmd, labi_ptr->boot_command, BOOT_COMMAND_MAX_LEN + 1);
        memcpy (&cmd[strlen((char *)cmd)], " ", strlen(" ") + 1);
        memcpy (&cmd[strlen((char *)cmd)], labi_ptr->image_addr, IMAGE_ADDR_MAX_LEN + 1);
        memcpy (&cmd[strlen((char *)cmd)], " ", strlen(" ") + 1);
        memcpy (&cmd[strlen((char *)cmd)], labi_ptr->cmd_arg, CMD_ARG_MAX_LEN + 1);
        printf("%s\n", cmd);
        run_result = run_command((char *)cmd, 0);
        if (run_result < 0)
        {
            /* terminate with error */
            printf("PFI%d/SFI%d/LABI%d Processing Terminated With Run Command Error\n", tuple_ind, tuple_ind, tuple_ind);
            sipi_dhcp_num_retries = -1;
            sipi_dhcp_error = -1;
            pfi_sfi_tftp_num_retries = -1;
            pfi_sfi_tftp_error = -1;
            return;
        }
    }
    sipi_dhcp_num_retries = -1;
    sipi_dhcp_error = -1;
    pfi_sfi_tftp_num_retries = -1;
    pfi_sfi_tftp_error = -1;
    printf("PFI/SFI/LABI Processing Completed\n");
}

int eeprom_dhcp_retry_check()
{
    if (sipi_dhcp_num_retries < 0)
    {
        return(-1);
    }
    else if (sipi_dhcp_num_retries == 0)
    {
        sipi_dhcp_error = 1;
        return(0);
    }
    else
    {
        --sipi_dhcp_num_retries;
        return(1);
    }
}

int eeprom_tftp_retry_check()
{
    if (pfi_sfi_tftp_num_retries < 0)
    {
        return(-1);
    }
    else if (sipi_dhcp_num_retries == 0)
    {
        sipi_dhcp_error = 1;
        return(0);
    }
    else
    {
        --sipi_dhcp_num_retries;
        return(1);
    }
}

int eeprom_tftp_error_process()
{
    if (pfi_sfi_tftp_error >= 0)
    {
        pfi_sfi_tftp_error = 1;
        return(1);
    }
    else
    {
        return(0);
    }
}

int eeprom_error_check()
{
    if ((sipi_dhcp_error == 1) || (pfi_sfi_tftp_error == 1))
    {
        return(1);
    }
    else
    {
        return(0);
    }
}

void eeprom_uart_set()
{
    uint16_t uarti_eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *uarti_eeprom_buf = (void *)uarti_eeprom_buf16;
    uint8_t cmd[OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1];
    octeon_eeprom_uart_info_t *uarti_ptr = (void *)uarti_eeprom_buf;
    int addr;
    int run_result;

    if (ctrlc())
    {
        puts ("\nAbort\n");
        return;
    }
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_UARTCONI_TYPE, 0, uarti_eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        memset (cmd, 0, OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1);
        memcpy (cmd, UARTI_SETENV_BAUDRATE_CMD, strlen(UARTI_SETENV_BAUDRATE_CMD) + 1);
        memcpy (&cmd[strlen((char *)cmd)], uarti_ptr->baudrate, BAUDRATE_MAX_LEN + 1);
        printf("%s\n", cmd);
        run_result = run_command((char *)cmd, 0);
        if (run_result < 0)
        {
            /* terminate with error */
            printf("UART Baudrate Processing Terminated With Error\n");
            return;
        }
    }
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_UARTMMCI_TYPE, 0, uarti_eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        memset (cmd, 0, OCTEON_EEPROM_MAX_TUPLE_LENGTH + 1);
        memcpy (cmd, UARTI_SETENV_BAUDRATE2_CMD, strlen(UARTI_SETENV_BAUDRATE2_CMD) + 1);
        memcpy (&cmd[strlen((char *)cmd)], uarti_ptr->baudrate, BAUDRATE_MAX_LEN + 1);
        printf("%s\n", cmd);
        run_result = run_command((char *)cmd, 0);
        if (run_result < 0)
        {
            /* terminate with error */
            printf("UART Baudrate2 Processing Terminated With Error\n");
            return;
        }
    }
}

int eeprom_diag_post_status (uint32_t verbose, uint64_t mem_loc, uint32_t freq,
                             uint8_t *out_cnt, char *out_mess, uint32_t loop, uint32_t *lloop, uint8_t testBitLength)
{
    uint8_t ch_inp;
    char outMem[128];

    if ((mem_loc % freq) == 0)
    {
        if (serial_tstc())
        {
            ch_inp = serial_getc();
            if (ch_inp == 0x03) /* ctrl-c */
            {
                printf("\nAbort\n");
                return(0);
            }
        }
        if (verbose)
        {
            sprintf(&outMem[0],
                    "\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
            puts(&outMem[0]);
            sprintf(&outMem[0], "0x%016qx Loop: 0x%08x %d%s", mem_loc, loop, testBitLength, out_mess);
            puts(&outMem[0]);
        }
        else
        {
            if (loop != *lloop)
            {
                sprintf(&outMem[0], "\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
                puts(&outMem[0]);
                sprintf(&outMem[0], "Loop: 0x%08x", loop);
                puts(&outMem[0]);
                *lloop = loop;
            }
        }
    }
    return(1);
}

int eeprom_csumtest_8bitcheck_ones_comp(octeon_eeprom_csumtest_info_t *csi_ptr)
{
    volatile uint8_t *cur_loc;
    uint8_t checksum = 0;
    uint8_t out_cnt = 0;
    uint8_t ch_inp;

    for (cur_loc = (uint8_t *)csi_ptr->start; cur_loc <= (uint8_t *)csi_ptr->end; cur_loc++)
    {
        if (((uint32_t)cur_loc & CSUMTEST_PD_FREQ) == 0)
        {
            if (serial_tstc())
            {
                ch_inp = serial_getc();
                if (ch_inp == 0x03) /* ctrl-c */
                {
                    printf("\nAbort\n");
                    return(0);
                }
            }
            switch (((out_cnt)++ % 4))
            {
            case 0:
                printf("\b|");
                break;
            case 1:
                printf("\b/");
                break;
            case 2:
                printf("\b-");
                break;
            case 3:
                printf("\b\\");
                break;
            }
        }
        checksum += *cur_loc;
    }
    checksum ^= 0xFF;
    if (checksum != *(uint8_t *)csi_ptr->csum_loc)
    {
        if (csi_ptr->failure_action == CSUMTEST_FAILURE_THEN_HANG)
        {
            return -1;
        }
        else
        {
            return 0;
        }
    }
    else
    {
        return 1;
    }
}

int eeprom_csumtest_16bitcheck_ones_comp(octeon_eeprom_csumtest_info_t *csi_ptr)
{
    volatile uint16_t *cur_loc;
    uint16_t checksum = 0;
    uint8_t out_cnt = 0;
    uint8_t ch_inp;

    for (cur_loc = (uint16_t *)csi_ptr->start; cur_loc <= (uint16_t *)csi_ptr->end; cur_loc++)
    {
        if (((uint32_t)cur_loc & CSUMTEST_PD_FREQ) == 0)
        {
            if (serial_tstc())
            {
                ch_inp = serial_getc();
                if (ch_inp == 0x03) /* ctrl-c */
                {
                    printf("\nAbort\n");
                    return(0);
                }
            }
            switch (((out_cnt)++ % 4))
            {
            case 0:
                printf("\b|");
                break;
            case 1:
                printf("\b/");
                break;
            case 2:
                printf("\b-");
                break;
            case 3:
                printf("\b\\");
                break;
            }
        }
        checksum += *cur_loc;
    }
    checksum ^= 0xFFFF;
    if (checksum != *(uint16_t *)csi_ptr->csum_loc)
    {
        if (csi_ptr->failure_action == CSUMTEST_FAILURE_THEN_HANG)
        {
            return -1;
        }
        else
        {
            return 0;
        }
    }
    else
    {
        return 1;
    }
}

int eeprom_csumtest_32bitcheck_ones_comp(octeon_eeprom_csumtest_info_t *csi_ptr)
{
    volatile uint32_t *cur_loc;
    uint32_t checksum = 0;
    uint8_t out_cnt = 0;
    uint8_t ch_inp;

    for (cur_loc = (uint32_t *)csi_ptr->start; cur_loc <= (uint32_t *)csi_ptr->end; cur_loc++)
    {
        if (((uint32_t)cur_loc & CSUMTEST_PD_FREQ) == 0)
        {
            if (serial_tstc())
            {
                ch_inp = serial_getc();
                if (ch_inp == 0x03) /* ctrl-c */
                {
                    printf("\nAbort\n");
                    return(0);
                }
            }
            switch (((out_cnt)++ % 4))
            {
            case 0:
                printf("\b|");
                break;
            case 1:
                printf("\b/");
                break;
            case 2:
                printf("\b-");
                break;
            case 3:
                printf("\b\\");
                break;
            }
        }
        checksum += *cur_loc;
    }
    checksum ^= 0xFFFFFFFF;
    if (checksum != *(uint32_t *)csi_ptr->csum_loc)
    {
        if (csi_ptr->failure_action == CSUMTEST_FAILURE_THEN_HANG)
        {
            return -1;
        }
        else
        {
            return 0;
        }
    }
    else
    {
        return 1;
    }
}

int eeprom_csumtest_64bitcheck_ones_comp(octeon_eeprom_csumtest_info_t *csi_ptr)
{
    volatile uint64_t *cur_loc;
    uint64_t checksum = 0;
    uint8_t out_cnt = 0;
    uint8_t ch_inp;

    for (cur_loc = (uint64_t *)csi_ptr->start; cur_loc <= (uint64_t *)csi_ptr->end; cur_loc++)
    {
        if (((uint32_t)cur_loc & CSUMTEST_PD_FREQ) == 0)
        {
            if (serial_tstc())
            {
                ch_inp = serial_getc();
                if (ch_inp == 0x03) /* ctrl-c */
                {
                    printf("\nAbort\n");
                    return(0);
                }
            }
            switch (((out_cnt)++ % 4))
            {
            case 0:
                printf("\b|");
                break;
            case 1:
                printf("\b/");
                break;
            case 2:
                printf("\b-");
                break;
            case 3:
                printf("\b\\");
                break;
            }
        }
        checksum += *cur_loc;
    }
    checksum ^= 0xFFFFFFFFFFFFFFFFLL;
    if (checksum != *(uint64_t *)csi_ptr->csum_loc)
    {
        if (csi_ptr->failure_action == CSUMTEST_FAILURE_THEN_HANG)
        {
            return -1;
        }
        else
        {
            return 0;
        }
    }
    else
    {
        return 1;
    }
}

int eeprom_csumtest_find_and_check(int id)
{
    uint16_t csi_eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *csi_eeprom_buf = (void *)csi_eeprom_buf16;
    octeon_eeprom_csumtest_info_t *csi_ptr = (void *)csi_eeprom_buf;
    int addr;
    int cs_result;

    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, id, 0, csi_eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        switch (id)
        {
        case EEPROM_CSUMTESTI0_TYPE:
            printf("Found CSI0  ");
            break;
        case EEPROM_CSUMTESTI1_TYPE:
            printf("Found CSI1  ");
            break;
        case EEPROM_CSUMTESTI2_TYPE:
            printf("Found CSI2  ");
            break;
        case EEPROM_CSUMTESTI3_TYPE:
            printf("Found CSI3  ");
            break;
        default:
            printf("UNKNOWN CSI!");
            break;
        }
        switch (csi_ptr->algorithm)
        {
        case CSUMTEST_8BIT_ONES_COMP:
            cs_result = eeprom_csumtest_8bitcheck_ones_comp(csi_ptr);
            break;
        case CSUMTEST_16BIT_ONES_COMP:
            cs_result = eeprom_csumtest_16bitcheck_ones_comp(csi_ptr);
            break;
        case CSUMTEST_32BIT_ONES_COMP:
            cs_result = eeprom_csumtest_32bitcheck_ones_comp(csi_ptr);
            break;
        case CSUMTEST_64BIT_ONES_COMP:
        default:
            cs_result = eeprom_csumtest_64bitcheck_ones_comp(csi_ptr);
            break;
        }
        if (cs_result < 0)
        {
            printf(" checksum failed - hang!\n");
            octeon_post_error_store (FLASH_CHECKSUM_ERROR);
            return -1;
        }
        else if (cs_result == 0)
        {
            printf(" checksum failed - continue.\n");
            octeon_post_error_store (FLASH_CHECKSUM_ERROR);
            return 0;
        }
        else
        {
            printf(" checksum passed.\n");
            return 1;
        }
    }
    return 1;
}

int eeprom_csumtest()
{
    if (eeprom_csumtest_find_and_check(EEPROM_CSUMTESTI0_TYPE) < 0)
    {
        return -1;
    }
    if (eeprom_csumtest_find_and_check(EEPROM_CSUMTESTI1_TYPE) < 0)
    {
        return -1;
    }
    if (eeprom_csumtest_find_and_check(EEPROM_CSUMTESTI2_TYPE) < 0)
    {
        return -1;
    }
    if (eeprom_csumtest_find_and_check(EEPROM_CSUMTESTI3_TYPE) < 0)
    {
        return -1;
    }
    return 1;
}

#define cvmx_read64_byte octeon_read64_byte
#define cvmx_write64_byte octeon_write64_byte
int eeprom_memtest_xxbit(uint64_t startAddr, uint64_t endAddr, uint32_t verbose, uint32_t step, uint32_t clear,
                         uint32_t continuous, uint64_t pattern1, uint64_t pattern2, uint32_t failureAction, uint8_t testBitLength)
{
    uint64_t cur_loc;
    uint32_t loop, lloop;
    uint8_t val_read_8bit;
    uint16_t val_read_16bit;
    uint32_t val_read_32bit;
    uint64_t val_read_64bit;
    uint8_t out_cnt = 0;
    char mOut[MEMTEST_MOUT];
    uint64_t mem_base, mem_size, mem_end;
    char *s;

    val_read_64bit = 0;

    mem_base = PMEM_START_DEFAULT;
    mem_size = PMEM_SIZE_DEFAULT;

#if defined(CONFIG_OCTEON_GEF_PMEM_GENERAL)
    /* Check if we should be using DDR PMEM instead */
    s = getenv("pmem_ddr");
    if (s != NULL)
    {
        if ((*s == 'y') || (*s == 'Y'))
        {
            mem_base = BOARD_BASE_PMEM_DDR_ADDR;

            /* Only use pmem_size if using PMEM DDR */
            if ((s = getenv("pmem_size")) != NULL)
            {
                /* get PMEM size */
                mem_size = simple_strtoull(s, NULL, 16);
            }
        }
    }
#endif /* CONFIG_OCTEON_GEF_PMEM_GENERAL */
    mem_end = mem_base + mem_size;
    lloop = 1;
    pattern1 &= 0x000000000000FFFFul;
    pattern2 &= 0x000000000000FFFFul;
    loop = 0;
    do
    {
        /* first write pattern1 and pattern2 (interleaved) */
        for (cur_loc = (0x8000000000000000ull | startAddr);
             cur_loc <= (0x8000000000000000ull | endAddr); )
        {
            if ((cur_loc >= mem_base) && (cur_loc <= mem_end))
            {
                cur_loc += (4 * step);
                continue;
            }
            if (eeprom_diag_post_status (verbose, cur_loc, MEMTEST_PD_FREQ, &out_cnt,
                                                                "-Bit / Pass 1 / Write        ", loop, &lloop, testBitLength) == 0)
            {
                return 1;
            }

			switch (testBitLength)
			{
			case 8:
				cvmx_write64_byte(cur_loc, pattern1);
				cur_loc += (2 * step);
                cvmx_write64_byte(cur_loc, pattern2);
				break;
			case 16:
				cvmx_write64_uint16(cur_loc, pattern1);
				cur_loc += (2 * step);
                cvmx_write64_uint16(cur_loc, pattern2);
				break;
			case 32:
				cvmx_write64_uint32(cur_loc, pattern1);
				cur_loc += (2 * step);
                cvmx_write64_uint32(cur_loc, pattern2);
				break;
			case 64:
				cvmx_write64_uint64(cur_loc, pattern1);
				cur_loc += (2 * step);
                cvmx_write64_uint64(cur_loc, pattern2);
				break;
			}

            cur_loc += (2 * step);
        }
        /* now read back and verify */
        for (cur_loc = (0x8000000000000000ull | startAddr);
             cur_loc <= (0x8000000000000000ull | endAddr); )
        {
            if ((cur_loc >= mem_base) && (cur_loc <= mem_end))
            {
                cur_loc += (4 * step);
                continue;
            }
            if (eeprom_diag_post_status (verbose, cur_loc, MEMTEST_PD_FREQ, &out_cnt,
                                                                "-Bit / Pass 1 / Read & Verify", loop, &lloop, testBitLength) == 0)
            {
                return 1;
            }

			switch (testBitLength)
			{
			case 8:
				val_read_8bit = cvmx_read64_byte(cur_loc);
				val_read_64bit = (uint64_t) val_read_8bit;
				break;
			case 16:
				val_read_16bit = cvmx_read64_uint16(cur_loc);
				val_read_64bit = (uint64_t) val_read_16bit;
				break;
			case 32:
				val_read_32bit = cvmx_read64_uint32(cur_loc);
				val_read_64bit = (uint64_t) val_read_32bit;
				break;
			case 64:
				val_read_64bit = cvmx_read64_uint64(cur_loc);
				break;
			}

            if ((testBitLength != 8 && val_read_64bit != pattern1) || (testBitLength == 8 && val_read_64bit != (uint8_t)pattern1))
            {
                sprintf (&mOut[0], "\n   Pass 1 error at 0x%016qx: wrote 0x%04x, read 0x%04x",
                    cur_loc, pattern1, val_read_64bit);
                puts (&mOut[0]);
                if (failureAction == MEMTEST_FAILURE_THEN_HANG)
                {
                    return -1;
                }
                else
                {
                    return 0;
                }
            }
            cur_loc += (2 * step);

			switch (testBitLength)
			{
			case 8:
				val_read_8bit = cvmx_read64_byte(cur_loc);
				val_read_64bit = (uint64_t) val_read_8bit;
				break;
			case 16:
				val_read_16bit = cvmx_read64_uint16(cur_loc);
				val_read_64bit = (uint64_t) val_read_16bit;
				break;
			case 32:
				val_read_32bit = cvmx_read64_uint32(cur_loc);
				val_read_64bit = (uint64_t) val_read_32bit;
				break;
			case 64:
				val_read_64bit = cvmx_read64_uint64(cur_loc);
				break;
			}

            if ((testBitLength != 8 && val_read_64bit != pattern2) || (testBitLength == 8 && val_read_64bit != (uint8_t)pattern2))
            {
                sprintf (&mOut[0], "\n   Pass 1 error at 0x%016qx: wrote 0x%04x, read 0x%04x",
                    cur_loc, pattern2, val_read_64bit);
                puts (&mOut[0]);
                if (failureAction == MEMTEST_FAILURE_THEN_HANG)
                {
                    return -1;
                }
                else
                {
                    return 0;
                }
            }
            cur_loc += (2 * step);
        }
        /* second write pattern1 and pattern2 (interleaved) */
        for (cur_loc = (0x8000000000000000ull | startAddr);
             cur_loc <= (0x8000000000000000ull | endAddr); )
        {
            if ((cur_loc >= mem_base) && (cur_loc <= mem_end))
            {
                cur_loc += (4 * step);
                continue;
            }
            if (eeprom_diag_post_status (verbose, cur_loc, MEMTEST_PD_FREQ, &out_cnt,
                                                                "-Bit / Pass 2 / Write        ", loop, &lloop, testBitLength) == 0)
            {
                return 1;
            }

			switch (testBitLength)
			{
			case 8:
				cvmx_write64_byte(cur_loc, pattern2);
				cur_loc += (2 * step);
                cvmx_write64_byte(cur_loc, pattern1);
				break;
			case 16:
				cvmx_write64_uint16(cur_loc, pattern2);
				cur_loc += (2 * step);
                cvmx_write64_uint16(cur_loc, pattern1);
				break;
			case 32:
				cvmx_write64_uint32(cur_loc, pattern2);
				cur_loc += (2 * step);
                cvmx_write64_uint32(cur_loc, pattern1);
				break;
			case 64:
				cvmx_write64_uint64(cur_loc, pattern2);
				cur_loc += (2 * step);
                cvmx_write64_uint64(cur_loc, pattern1);
				break;
			}

            cur_loc += (2 * step);
        }
        /* now read back and verify */
        for (cur_loc = (0x8000000000000000ull | startAddr);
             cur_loc <= (0x8000000000000000ull | endAddr); )
        {
            if ((cur_loc >= mem_base) && (cur_loc <= mem_end))
            {
                cur_loc += (4 * step);
                continue;
            }
            if (eeprom_diag_post_status (verbose, cur_loc, MEMTEST_PD_FREQ, &out_cnt,
                                                                "-Bit / Pass 2 / Read & Verify", loop, &lloop, testBitLength) == 0)
            {
                return 1;
            }

			switch (testBitLength)
			{
			case 8:
				val_read_8bit = cvmx_read64_byte(cur_loc);
				val_read_64bit = (uint64_t) val_read_8bit;
				break;
			case 16:
				val_read_16bit = cvmx_read64_uint16(cur_loc);
				val_read_64bit = (uint64_t) val_read_16bit;
				break;
			case 32:
				val_read_32bit = cvmx_read64_uint32(cur_loc);
				val_read_64bit = (uint64_t) val_read_32bit;
				break;
			case 64:
				val_read_64bit = cvmx_read64_uint64(cur_loc);
				break;
			}

            if ((testBitLength != 8 && val_read_64bit != pattern2) || (testBitLength == 8 && val_read_64bit != (uint8_t)pattern2))
            {
                sprintf (&mOut[0], "\n   Pass 2 error at 0x%016qx: wrote 0x%04x, read 0x%04x",
                    cur_loc, pattern2, val_read_64bit);
                puts (&mOut[0]);
                if (failureAction == MEMTEST_FAILURE_THEN_HANG)
                {
                    return -1;
                }
                else
                {
                    return 0;
                }
            }
            else if (clear)
            {
				switch (testBitLength)
				{
				case 8:
					cvmx_write64_byte(cur_loc, 0);
					break;
				case 16:
					cvmx_write64_uint16(cur_loc, 0);
					break;
				case 32:
					cvmx_write64_uint32(cur_loc, 0);
					break;
				case 64:
					cvmx_write64_uint64(cur_loc, 0);
					break;
				}
            }

            cur_loc += (2 * step);

			switch (testBitLength)
			{
			case 8:
				val_read_8bit = cvmx_read64_byte(cur_loc);
				val_read_64bit = (uint64_t) val_read_8bit;
				break;
			case 16:
				val_read_16bit = cvmx_read64_uint16(cur_loc);
				val_read_64bit = (uint64_t) val_read_16bit;
				break;
			case 32:
				val_read_32bit = cvmx_read64_uint32(cur_loc);
				val_read_64bit = (uint64_t) val_read_32bit;
				break;
			case 64:
				val_read_64bit = cvmx_read64_uint64(cur_loc);
				break;
			}

            if ( (testBitLength != 8 && val_read_64bit != pattern1) || (testBitLength == 8 && val_read_64bit != (uint8_t)pattern1))
            {
                sprintf (&mOut[0], "\n   Pass 2 error at 0x%016qx: wrote 0x%04x, read 0x%04x",
                    cur_loc, pattern1, val_read_64bit);
                puts (&mOut[0]);
                if (failureAction == MEMTEST_FAILURE_THEN_HANG)
                {
                    return -1;
                }
                else
                {
                    return 0;
                }
            }
            else if (clear)
            {
				switch (testBitLength)
				{
				case 8:
					cvmx_write64_byte(cur_loc, 0);
					break;
				case 16:
					cvmx_write64_uint16(cur_loc, 0);
					break;
				case 32:
					cvmx_write64_uint32(cur_loc, 0);
					break;
				case 64:
					cvmx_write64_uint64(cur_loc, 0);
					break;
				}
            }
            cur_loc += (2 * step);
        }
        ++loop;
    }
    while (continuous);

    return 1;
}

int eeprom_memtest_find_and_check(int id)
{
    uint16_t mti_eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *mti_eeprom_buf = (void *)mti_eeprom_buf16;
    octeon_eeprom_memtest_info_t *mti_ptr = (void *)mti_eeprom_buf;
    int addr;
    int mt_result;

    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, id, 0, mti_eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        switch (id)
        {
            case EEPROM_MEMTESTI0_TYPE:
                printf("Found MEMTESTI - 0:                 ");
                break;
            case EEPROM_MEMTESTI1_TYPE:
                printf("Found MEMTESTI - 1:                 ");
                break;
            case EEPROM_MEMTESTI2_TYPE:
                printf("Found MEMTESTI - 2:                 ");
                break;
            case EEPROM_MEMTESTI3_TYPE:
                printf("Found MEMTESTI - 3:                 ");
                break;
            default:
                printf("UNKNOWN MTI!");
                break;
        }
        if (mti_ptr->verbose)
        {
            printf("                                                   ");
        }
		switch (mti_ptr->algorithm)
		{
		case MEMTEST_8BIT:
			mt_result = eeprom_memtest_xxbit(mti_ptr->start, mti_ptr->end, mti_ptr->verbose, mti_ptr->step, 0, 0,
                                                mti_ptr->pattern1, mti_ptr->pattern2, mti_ptr->failure_action, 8);
			break;
	
		case MEMTEST_16BIT:
			mt_result = eeprom_memtest_xxbit(mti_ptr->start, mti_ptr->end, mti_ptr->verbose, mti_ptr->step, 0, 0,
                                                mti_ptr->pattern1, mti_ptr->pattern2, mti_ptr->failure_action, 16);
				break;
	
		case MEMTEST_32BIT:
			mt_result = eeprom_memtest_xxbit(mti_ptr->start, mti_ptr->end, mti_ptr->verbose, mti_ptr->step, 0, 0,
                                                mti_ptr->pattern1, mti_ptr->pattern2, mti_ptr->failure_action, 32);
			break;
		case MEMTEST_64BIT:
		default:
			mt_result = eeprom_memtest_xxbit(mti_ptr->start, mti_ptr->end, mti_ptr->verbose, mti_ptr->step, 0, 0,
                                                mti_ptr->pattern1, mti_ptr->pattern2, mti_ptr->failure_action, 64);
			break;
		}
        if (mt_result < 0)
        {
            printf(" memory failed - hang\n");
            octeon_post_error_store (RAM_FAILURE);
            return -1;
        }
        else if (mt_result == 0)
        {
            printf(" memory failed - continue\n");
            octeon_post_error_store (RAM_FAILURE);
            return 0;
        }
        else
        {
            printf(" memory passed\n");
            return 1;
        }
    }
    return 1;
}

int eeprom_memtest(void)
{
    if (eeprom_memtest_find_and_check(EEPROM_MEMTESTI0_TYPE) < 0)
    {
        return -1;
    }
    if (eeprom_memtest_find_and_check(EEPROM_MEMTESTI1_TYPE) < 0)
    {
        return -1;
    }
    if (eeprom_memtest_find_and_check(EEPROM_MEMTESTI2_TYPE) < 0)
    {
        return -1;
    }
    if (eeprom_memtest_find_and_check(EEPROM_MEMTESTI3_TYPE) < 0)
    {
        return -1;
    }
    return 1;
}

#ifdef CONFIG_OCTEON_AT5810
extern int npaPresteraDeviceIdCheck(void);
int prestera_validate(void)
{
    uint16_t fpga_mcr;

    fpga_mcr = *BOARD_MASTER_CONTROL_REG;
    if (cvmx_read_csr(CVMX_GPIO_RX_DAT) & 0x8000)
    {
        if ((fpga_mcr & GES_OWNED_MASK) == GES_OCT_B_OWNED)
        {
            /* this is Octeon B and Octeon B owns Prestera */
            if (npaPresteraDeviceIdCheck() != 1)
            {
                return 0;
            }
        }
    }
    else
    {
        if ((fpga_mcr & GES_OWNED_MASK) == GES_OCT_A_OWNED)
        {
            /* this is Octeon A and Octeon A owns Prestera */
            if (npaPresteraDeviceIdCheck() != 1)
            {
                return 0;
            }
        }
    }
    return 1;
}

int redhawk_validate(void)
{
    uint16_t fpga_mcr;

    fpga_mcr = *BOARD_MASTER_CONTROL_REG;
    if (cvmx_read_csr(CVMX_GPIO_RX_DAT) & 0x8000)
    {
        if ((fpga_mcr & RHWK_OWNED_MASK) == RHWK_OCT_B_OWNED)
        {
            /* this is Octeon B and Octeon B owns Redhawk */
            if (*BOARD_REDHAWK_CO_DEVICE != RH_DEFAULT_DEVID)
            {
                return 0;
            }
        }
    }
    else
    {
        if ((fpga_mcr & RHWK_OWNED_MASK) == RHWK_OCT_A_OWNED)
        {
            /* this is Octeon A and Octeon A owns Redhawk */
            if (*BOARD_REDHAWK_CO_DEVICE != RH_DEFAULT_DEVID)
            {
                return 0;
            }
        }
    }
    return 1;
}

int eagle_validate(void)
{
    uint16_t fpga_mcr;

    fpga_mcr = *BOARD_MASTER_CONTROL_REG;
    if (cvmx_read_csr(CVMX_GPIO_RX_DAT) & 0x8000)
    {
        if ((fpga_mcr & RTM_OWNED_MASK) == RTM_OCT_B_OWNED)
        {
            /* this is Octeon B and Octeon B owns RTM */
            if (*BOARD_RTM_GE_CARDID == GE_RTM_CARDID)
            {
                if (*BOARD_RTM_EAGLE_CO_DEVICE != EG_DEFAULT_DEVID)
                {
                    return 0;
                }
            }
        }
    }
    else
    {
        if ((fpga_mcr & RTM_OWNED_MASK) == RTM_OCT_A_OWNED)
        {
            /* this is Octeon A and Octeon A owns RTM */
            if (*BOARD_RTM_GE_CARDID == GE_RTM_CARDID)
            {
                if (*BOARD_RTM_EAGLE_CO_DEVICE != EG_DEFAULT_DEVID)
                {
                    return 0;
                }
            }
        }
    }
    return 1;
}
#endif

int eeprom_phytest(void)
{
    uint16_t pti_eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *pti_eeprom_buf = (void *)pti_eeprom_buf16;
    octeon_eeprom_phytest_info_t *pti_ptr = (void *)pti_eeprom_buf;
    int addr;
    uint8_t ch_inp;

    if (serial_tstc())
    {
        ch_inp = serial_getc();
        if (ch_inp == 0x03) /* ctrl-c */
        {
            printf("\nAbort\n");
            return(0);
        }
    }
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_PHYTESTI_TYPE, 0, pti_eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        if (pti_ptr->algorithm != 0)
        {
            /* only algorithm 0 is supported at this time */
            return 1;
        }

#ifdef CONFIG_OCTEON_AT5810
        printf("Found PTI -");
        if (prestera_validate() == 1)
        {
            if (redhawk_validate() == 1)
            {
                if (eagle_validate() == 1)
                {
                    printf(" passed\n");
                }
                else
                {
                    octeon_post_error_store (PHY_FAILURE);
                    if (pti_ptr->failure_action == PHYTEST_FAILURE_THEN_HANG)
                    {
                        printf(" PHY / Eagle failed - hang\n");
                        return -1;
                    }
                    else
                    {
                        printf(" PHY / Eagle failed - continue\n");
                    }
                }
            }
            else
            {
                octeon_post_error_store (PHY_FAILURE);
                if (pti_ptr->failure_action == PHYTEST_FAILURE_THEN_HANG)
                {
                    printf(" PHY / Redhawk failed - hang\n");
                    return -1;
                }
                else
                {
                    printf(" PHY / Redhawk failed - continue\n");
                }
            }
        }
        else
        {
            octeon_post_error_store (PHY_FAILURE);
            if (pti_ptr->failure_action == PHYTEST_FAILURE_THEN_HANG)
            {
                printf(" PHY / Prestera failed - hang\n");
                return -1;
            }
            else
            {
                printf(" PHY / Prestera failed - continue\n");
            }
        }
#else
        {
            unsigned short val;
            int i;

            printf("Found PTI -\n");

            for (i = 0; i < MAX_PORTS; i++);
            {
                /* PHY 0 test */
                if (pti_ptr->dev_sel_map & (0x0001 << i))
                {
                    if (miiphy_read(i, 0, &val) == 0)
                    {
                        if (val == PHY_DEFAULT_VAL)
                        {
                            printf("            PHY %d passed\n", i);
                        }
                        else
                        {
                            octeon_post_error_store (PHY_FAILURE);
                            if (pti_ptr->failure_action == PHYTEST_FAILURE_THEN_HANG)
                            {
                                printf("            PHY %d failed (invalid register value) - hang\n", i);
                                return -1;
                            }
                            else
                            {
                                printf("            PHY %d failed (invalid register value) - continue\n", i);
                            }
                        }
                    }
                    else
                    {
                        octeon_post_error_store (PHY_FAILURE);
                        if (pti_ptr->failure_action == PHYTEST_FAILURE_THEN_HANG)
                        {
                            printf("            PHY %d failed (invalid read operation or timeout) - hang\n", i);
                            return -1;
                        }
                        else
                        {
                            printf("            PHY %d failed (invalid read operation or timeout) - continue\n", i);
                        }
                    }
                }


            }

            return 0;
        }
#endif

    }

    return 1;
}

#if defined(CONFIG_OCTEON_AT5810)
/* the blade only tests the lower 16MB of pmem */
#define PMEMPOST_NUM_BLOCKS       64
#else
/* test all 32 MB's of PMEM */
#define PMEMPOST_NUM_BLOCKS       128
#endif /*CONFIG_OCTEON_AT5810*/

#define PMEMPOST_BLOCK_SIZE       (256*1024)
#define PMEMPOST_SHORT_BLOCK_TEST (8*1024)
#define PMEMPOST_LONG_BLOCK_TEST  PMEMPOST_BLOCK_SIZE
#define PMEMPOST_PATTERN1         0x55555555
#define PMEMPOST_PATTERN2         0xAAAAAAAA

int eeprom_pmempost_compare (uint64_t addr, uint64_t save, uint64_t writeVal, uint64_t readVal)
{
    if (writeVal != readVal)
    {
        octeon_post_error_store (PMEM_FAILURE);
        printf("\nERROR:eeprom_pmempost_short():addr:0x%016qx\n", addr);
        printf("   was: 0x%08x, wrote: 0x%08x, read: 0x%08x\n", save, writeVal, readVal);
        return 1;
    }
    else
    {
        return 0;
    }
}

void eeprom_pmempost_test(uint32_t block_depth, uint32_t pattern1, uint32_t pattern2,
                          uint32_t restore, uint32_t init_pattern, uint32_t verbose, uint32_t continuous)
{
#if defined(CONFIG_OCTEON_GEF_PMEM_GENERAL)
    uint8_t ch_inp;
    uint32_t save1, save2, readback, loop, lloop;
    uint32_t pmem_cur_block, pmem_addr_loc;
    uint64_t addr, base_addr, pmem_base, pmem_size, pmem_use_loc;
    char *s;

    /* Persistent Memory Test */
    loop = 0;
    lloop = 1;

    pmem_base = BOARD_BASE_PMEM_ADDR;
    pmem_size = PMEM_SIZE_DEFAULT;
    base_addr = 0x8001000000000000ull;

    /* Check if we should be using DDR PMEM instead */
    s = getenv("pmem_ddr");
    if (s != NULL)
    {
        if ((*s == 'y') || (*s == 'Y'))
        {
            pmem_base = BOARD_BASE_PMEM_DDR_ADDR;
            base_addr = 0x8000000000000000ull;

            /* Only use pmem_size if using PMEM DDR */
            if ((s = getenv("pmem_size")) != NULL)
            {
                /* get PMEM size */
                pmem_size = simple_strtoull(s, NULL, 16);
                block_depth = pmem_size / PMEMPOST_NUM_BLOCKS;
            }
        }
    }

    do
    {
        for (pmem_cur_block = 0; pmem_cur_block < PMEMPOST_NUM_BLOCKS; pmem_cur_block++)
        {
            if (serial_tstc())
            {
                ch_inp = serial_getc();
                if (ch_inp == 0x03) /* ctrl-c */
                {
                    printf("\nPMEM Test Aborted By User (no errors detected)\n");
                    return;
                }
            }
            pmem_use_loc = pmem_base + (pmem_cur_block * block_depth);
            addr = base_addr + pmem_use_loc;
            if (verbose)
            {
                printf ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b0x%016qx Loop: 0x%08x",
                        addr, loop);
            }
            else if (loop != lloop)
            {
                printf ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\bLoop: 0x%08x", loop);
                lloop = loop;
            }
            for (pmem_addr_loc = 0; pmem_addr_loc < block_depth; pmem_addr_loc += 8)
            {
                pmem_use_loc = pmem_base + (pmem_cur_block * PMEMPOST_BLOCK_SIZE) + pmem_addr_loc;
                addr = base_addr + pmem_use_loc;
                save1 = cvmx_read64_uint32(addr);
                cvmx_write64_uint32(addr, pattern1);
                save2 = cvmx_read64_uint32(addr + 4);
                cvmx_write64_uint32(addr + 4, pattern2);
                readback = cvmx_read64_uint32(addr);
                if (eeprom_pmempost_compare(addr, save1, pattern1, readback)) return;
                readback = cvmx_read64_uint32(addr + 4);
                if (eeprom_pmempost_compare(addr, save2, pattern2, readback)) return;
                if (restore)
                {
                    cvmx_write64_uint32(addr, save1);
                    cvmx_write64_uint32(addr + 4, save2);
                }
                else
                {
                    cvmx_write64_uint32(addr, init_pattern);
                    cvmx_write64_uint32(addr + 4, init_pattern);
                }
            }
#if defined(CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT)
            /* Must 1st disable watchdog to reset a new timeout value */
            BOOT_PROGRESS_UPDATE(BPM_DISABLE_WATCH_DOG);
            BOOT_PROGRESS_UPDATE(BPM_MEMPOST_LONG);
#endif
         }
        ++loop;
    }
    while (continuous);
    printf (" persistent memory passed\n");
#else
    printf (" persistent memory not supported on this board\n");

#endif /* CONFIG_OCTEON_GEF_PMEM_GENERAL */

    return;
}

int eeprom_pmemtest(void)
{
#if defined(CONFIG_OCTEON_GEF_PMEM_GENERAL)

    uint16_t pmti_eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *pmti_eeprom_buf = (void *)pmti_eeprom_buf16;
    octeon_eeprom_pmemtest_info_t *pmti_ptr = (void *)pmti_eeprom_buf;
    int addr;

    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_PMEMTESTI_TYPE, 0, pmti_eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        printf("Found PMTI - ");
        if (pmti_ptr->algorithm == 0)
        {
            printf ("PMEMPOST / Short test started:                 ");
            if (pmti_ptr->verbose)
            {
                printf ("                   ");
            }
            eeprom_pmempost_test(PMEMPOST_SHORT_BLOCK_TEST, PMEMPOST_PATTERN1, PMEMPOST_PATTERN2, 1, 0, pmti_ptr->verbose, 0);
        }
        else if (pmti_ptr->algorithm == 1)
        {
            printf ("PMEMPOST / Long test started:                 ");
            if (pmti_ptr->verbose)
            {
                printf ("                   ");
            }
            eeprom_pmempost_test(PMEMPOST_LONG_BLOCK_TEST, PMEMPOST_PATTERN1, PMEMPOST_PATTERN2, 1, 0, pmti_ptr->verbose, 0);
        }
        else
        {
            return 1;
        }
    }
    return 0;
#else

    printf (" persistent memory not supported on this board\n");
    return 1;
#endif /* CONFIG_OCTEON_GEF_PMEM_GENERAL */

}

extern int npaInitLlm(void);

            #if defined(CONFIG_OCTEON_W3860)
int checkRldram(void)
{
    uint16_t rld_eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *rld_eeprom_buf = (void *)rld_eeprom_buf16;
    octeon_eeprom_rldramtest_info_t *rldramtesti_ptr = (void *)rld_eeprom_buf;
    int addr;

    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_RLDRAM_TEST_TYPE, 0, rld_eeprom_buf, OCTEON_EEPROM_MAX_TUPLE_LENGTH);

    if (addr >= 0)
    {
        printf("Found RLDRAM tuple - \n");
        if ((rldramtesti_ptr->size < 0) || (rldramtesti_ptr->replType < 0) || (rldramtesti_ptr->replType > 3))
        {
            printf("argument error: use 'tlv_eeprom help'\n");
            return 1;
        }
        else
        {
            testLlm(rldramtesti_ptr->addr, rldramtesti_ptr->size, rldramtesti_ptr->replType, rldramtesti_ptr->display);
        }
    }
    return 0;
}
            #endif

#define SWDIAGS_BLOCK_TEST (32*1024)

int eeprom_all_diags_short(void)
{
    int i;

    i = 0;
    /* Memory Test */
    printf ("POST test started.\n");
    /* loop through all the post tests */
    while (postTest[i].name != NULL)
    {
        /* mempost is handled differently from the other post tests */
        if (!strncmp(postTest[i].name, "mempost", strlen("mempost")))
        {
#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
            BOOT_PROGRESS_UPDATE(BPM_MEMPOST_SHORT);
#endif
            if (postTest[i].shortTest("Short") == MEMPOST_FAIL_HANG)
            {
                return MEMPOST_FAIL_HANG;
            }
        }
        else
        {
            postTest[i].shortTest("");
        }
        i++;
    }
    printf ("POST test completed.\n");

    return 0;
}

int eeprom_all_diags_long(void)
{
    int i;

    i = 0;
    /* Memory Test */
    printf ("POST test started.\n");

    /* loop through all the post tests */
    while (postTest[i].name != NULL)
    {
        /* mempost is handled differently from the other post tests */
        if (!strncmp(postTest[i].name, "mempost", strlen("mempost")))
        {
#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
            BOOT_PROGRESS_UPDATE(BPM_MEMPOST_LONG);
#endif
            if (postTest[i].longTest("Long") == MEMPOST_FAIL_HANG)
            {
                return -1;
            }
        }
        else
        {
            postTest[i].longTest("");
        }
        i++;
    }

    printf ("POST test completed.\n");
    return 0;
}

int eeprom_mempost_init(char *test_length)
{
    uint64_t mpStart, mpEnd, mpPattern1, mpPattern2;
    uint32_t mpFailAction, mpSize, mpVerbose, mpStep;
    int test_result;
    char *s1;

    /* MEMTEST POST */
    if ((s1 = getenv("mempoststart")) != NULL)
    {
        mpStart = simple_strtoull(s1, NULL, 16);
    }
    else
    {
        mpStart = MEMPOST_START;
    }
    if ((s1 = getenv("mempostend")) != NULL)
    {
        mpEnd = simple_strtoull(s1, NULL, 16);
    }
    else
    {
        mpEnd = MEMPOST_END;
    }
    if ((s1 = getenv("mempostpattern1")) != NULL)
    {
        mpPattern1 = simple_strtoull(s1, NULL, 16);
    }
    else
    {
        mpPattern1 = MEMPOST_PATTERN1;
    }
    if ((s1 = getenv("mempostpattern2")) != NULL)
    {
        mpPattern2 = simple_strtoull(s1, NULL, 16);
    }
    else
    {
        mpPattern2 = MEMPOST_PATTERN2;
    }
    if ((s1 = getenv("mempostfailaction")) != NULL)
    {
        mpFailAction = simple_strtoul(s1, NULL, 16);
    }
    else
    {
        mpFailAction = MEMPOST_FAIL_CONTINUE;
    }
    if ((s1 = getenv("mempostalgorithm")) != NULL)
    {
        mpSize = simple_strtoul(s1, NULL, 16);
    }
    else
    {
        mpSize = MEMPOST_64BIT;
    }
    if ((s1 = getenv("mempostverbose")) != NULL)
    {
        mpVerbose = simple_strtoul(s1, NULL, 16);
    }
    else
    {
        mpVerbose = 1;
    }
    if ((s1 = getenv("mempoststep")) != NULL)
    {
        mpStep = simple_strtoul(s1, NULL, 16);
    }
    else
    {
        mpStep = MEMPOST_STEP_SHORT;
    }

    if (mpVerbose)
    {
        printf ("MEMPOST / %s test started:                                                                    ",test_length);
    }
    else
    {
        printf ("MEMPOST / %s    test started:                 ",test_length);
    }

#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
    BOOT_PROGRESS_UPDATE(BPM_MEMPOST_SHORT);
#endif

    /**
     * Check is there is a memory DIMM in all memory interfaces. 
     * Test will Fail if there is not 1 memory dimm on each Octeon 
     * memory interface. 
     */
    dimm_config_t dimm_config_table[] = 
        {
#ifdef DRAM_SOCKET_CONFIGURATION
            DRAM_SOCKET_CONFIGURATION,
#endif /* DRAM_SOCKET_CONFIGURATION */
            {
                {0},
                {0}
            }
        };

    /* Check for lower DIMM socket populated */
    if (!validate_dimm(dimm_config_table[0], 0)) 
    {
        octeon_post_error_store (INTERFACE0_DIMM_NOT_DETECTED);
        printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
        printf(" Failed! Missing memory dimm\n");
        return (mpFailAction);
    }

    /* This is the second memory interface that was first seen on the 56XX processors */
#ifdef DRAM_SOCKET_CONFIGURATION_INTERFACE1
    dimm_config_t dimm_config_table_interface1[] = 
        {
            DRAM_SOCKET_CONFIGURATION_INTERFACE1,
            {
                {0},
                {0}
            }
        };

    if (!validate_dimm(dimm_config_table_interface1[0], 0)) 
    {
        octeon_post_error_store (INTERFACE1_DIMM_NOT_DETECTED);
        printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
        printf(" Failed! Missing memory dimm\n");
        return (mpFailAction);
    }
#endif /* DRAM_SOCKET_CONFIGURATION_INTERFACE1 */


    /* Memory Test */
	switch (mpSize)
	{
	case MEMTEST_8BIT:
		test_result = eeprom_memtest_xxbit(mpStart,mpEnd,mpVerbose,mpStep,0,0,mpPattern1,mpPattern2,mpFailAction, 8);
		break;

	case MEMTEST_16BIT:
		test_result = eeprom_memtest_xxbit(mpStart,mpEnd,mpVerbose,mpStep,0,0,mpPattern1,mpPattern2,mpFailAction, 16);
			break;

	case MEMTEST_32BIT:
		test_result = eeprom_memtest_xxbit(mpStart,mpEnd,mpVerbose,mpStep,0,0,mpPattern1,mpPattern2,mpFailAction, 32);
		break;
	case MEMTEST_64BIT:
	default:
		test_result = eeprom_memtest_xxbit(mpStart,mpEnd,mpVerbose,mpStep,0,0,mpPattern1,mpPattern2,mpFailAction, 64);
		break;
	}

    if (test_result == MEMPOST_FAIL_HANG)
    {
        printf(" memory failed - hang\n");
    }
    else if (test_result == MEMPOST_FAIL_CONTINUE)
    {
        printf(" memory failed - continue\n");
    }
    else
    {
        printf(" memory passed\n");
    }
    return(test_result);
}

int eeprom_csumpost_short(char *notused)
{

#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
    BOOT_PROGRESS_UPDATE(BPM_CSUMPOST_SHORT);
#endif

    /* Checksum Test */
    printf ("CSUMPOST / Short test started...");
    printf (" done\n");

    return 0;
}

int eeprom_csumpost_long(char *notused)
{

#ifdef CONFIG_OCTEON_AT5810
    BOOT_PROGRESS_UPDATE(BPM_CSUMPOST_LONG);
#endif

    /* Checksum Test */
    printf ("CSUMPOST / Long test started...");
    printf (" done\n");

    return 0;
}

void eeprom_phy_test(void)
{

#ifdef CONFIG_OCTEON_AT5810
    if (prestera_validate() == 1)
    {
        if (redhawk_validate() == 1)
        {
            if (eagle_validate() == 1)
            {
                printf (" passed\n");
            }
            else
            {
                octeon_post_error_store (PHY_FAILURE);
                printf(" Eagle read failure\n");
            }
        }
        else
        {
            octeon_post_error_store (PHY_FAILURE);
            printf(" Redhawk read failure\n");
        }
    }
    else
    {
        octeon_post_error_store (PHY_FAILURE);
        printf(" Prestera read failure\n");
    }
#endif

}

void readPhyReg(int interface,int reg , unsigned short *val)
{
#if defined(CONFIG_OCTEON_DYNAMIC_BOARD_DETECTION)
    if (IS_SFP_PRESENT)
    {
        extern void sfpVSRegRead(int dev, int reg, int *val);
        int val_loc;/*must pass in an int for this to work*/
        sfpVSRegRead (BOARD_SFP0_TWSI_ADDR + interface, reg,&val_loc);
        //copy the local value to the returned value
        *val =  (unsigned short )val_loc;
    }
    else
#endif
    {
        miiphy_read(interface, reg, val);
    }
             
    return;
} //readPhyReg()


void run_standard_phy_test(void)
{
    unsigned short val;
    int i;
    int error;
    int rc;

    i = 0;
    error = 0;
    rc = 0;

#if defined(CONFIG_OCTEON_5651x)
    /**   There are four PHYs on the TNPA-5651x board: two AMCC QT2225 10GB 
     ** PHYS and two PHYS internal to the Intel 82571.  However, only the two 
     ** AMCC PHYS are tested because the 82571 has not been initialized at the
     ** time this function is called.  AND it cannot be initialied until Uboot
     ** has been moved into RAM which happens much later in the boot sequence.
     **
     ** That being said, this function does a poor job of testing the PHYS.  It
     ** was fixed for the TNPA-5651x only to comply with release requirements.
     ** The built-in BIST tests do a much better job of testing and verifying 
     ** the Ethernet electronics on this board.
     **/
    {
    uint16_t swork;                   /* 16-bit working reg */
    int test_passed;

    test_passed = 1;          /* pre-int a "PASSED" condition */
    /* Read PHY 0 control register */
    phyRegRead(BOARD_10G_PHY0_MDIO_ADDR, QT2025_PMA_PMD_CTRL1_REG, &swork,
               AMCC_DEV_ADDR_PCS, MDIO_BUS_0);

    if ((swork & PHY_CTRL_REG_TEST_MASK) != PHY_CTRL_REG_TEST_MASK)
      {
      printf("            PHY 0 failed (invalid register value)\n");
      test_passed = 0;
      }

    /* Read PHY 1 control register */
    phyRegRead(BOARD_10G_PHY0_MDIO_ADDR, QT2025_PMA_PMD_CTRL1_REG, &swork,
               AMCC_DEV_ADDR_PCS, MDIO_BUS_1);

    if ((swork & PHY_CTRL_REG_TEST_MASK) != PHY_CTRL_REG_TEST_MASK)
      {
      printf("            PHY 1 failed (invalid register value)\n");
      test_passed = 0;
      }

    if (test_passed)
      printf (" passed\n");

    return;
    }
#endif

#if defined(CONFIG_OCTEON_DYNAMIC_BOARD_DETECTION)
    if (IS_10G_PHY_PRESENT)
    {
        rc = amcc_is_phy_alive(BOARD_10G_PHY0_MDIO_ADDR);
        if (rc)
        {
            printf("            PHY %d failed (invalid register value)\n", i);
        }

        if (IS_10G_DUAL_PHY_PRESENT)
        {
            amcc_is_phy_alive(BOARD_10G_PHY1_MDIO_ADDR);
        }

        if (rc)
        {
            printf("            PHY %d failed (invalid register value)\n", i);
        }

        printf (" done\n");
    }
    else
#endif // CONFIG_OCTEON_DYNAMIC_BOARD_DETECTION
    {
        for (i = 0; i < MAX_PORTS; i++)
        {
            readPhyReg(i,0 , &val);
            if ((val | 0x1000) != PHY_DEFAULT_VAL)
            {
                error++;
                octeon_post_error_store (PHY_FAILURE);
                if (error == 1)
                {
                    //for the first error we need the leading newline for nice formatting
                    printf("\n");
                }
                printf("            PHY %d failed (invalid register value)\n", i);
            }
        }
    
        printf (" done\n");
    }
}

void init_phys(void)
{
#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
    BOOT_PROGRESS_UPDATE(BPM_PHYPOST_SHORT);
#else
#if defined(CONFIG_OCTEON_DYNAMIC_BOARD_DETECTION)
    if (IS_SFP_PRESENT)
    {
        /* bring up the SFPs */
        sfpLinkSetup(0);
    }
    else if (IS_10G_PHY_PRESENT)
    {
        amcc10gPhyLinkSetup(BOARD_10G_PHY0_MDIO_ADDR);
        if (IS_10G_DUAL_PHY_PRESENT)
        {
            amcc10gPhyLinkSetup(BOARD_10G_PHY1_MDIO_ADDR);
        }
    }
    else if (!IS_10G_PHY_PRESENT)
    {
        /* bring up the phys */
        /* this is also the default case for all legacy boards w/ SFPs (W3860/W3850/T3804/T5854/W58xx */
        phyLinkSetup(0);
    }
#else /*CONFIG_OCTEON_DYNAMIC_BOARD_DETECTION*/

    /* all other board only support SFPs*/
    /* bring up the SFPs */
    phyLinkSetup(0);

#endif /*CONFIG_OCTEON_DYNAMIC_BOARD_DETECTION*/

#endif /* CONFIG_OCTEON_AT5810 */

#if defined(CONFIG_OCTEON_5651x)

	/* bring up the SFPs */
    /* NOTE:  The AMCC PHYs are accessible wiithout initializing them first
              however the data read back may be different.  That being said
              there is no need to initialize the PHYS for this simple PHY
              check.  Initializing the PHYS does cause a lot of extra 
              messages to be displayed during the test.  */
	//sfpLinkSetup();

#endif

    return;
}


int eeprom_phypost_short(char *notused)
{

    init_phys();

    /* PHY Test */
    printf ("PHYPOST / Short test started...");

#ifdef CONFIG_OCTEON_AT5810
    if (prestera_validate() == 1)
    {
        if (redhawk_validate() == 1)
        {
            if (eagle_validate() == 1)
            {
                printf (" passed\n");
            }
            else
            {
                octeon_post_error_store (PHY_FAILURE);
                printf(" Eagle read failure\n");
            }
        }
        else
        {
            octeon_post_error_store (PHY_FAILURE);
            printf(" Redhawk read failure\n");
        }
    }
    else
    {
        octeon_post_error_store (PHY_FAILURE);
        printf(" Prestera read failure\n");
    }
#else
    { 
        run_standard_phy_test();
    }

#endif

    return 0;
}

int eeprom_phypost_long(char *notused)
{

    init_phys();

    /* PHY Test */
    printf ("PHYPOST / Long test started...");

#ifdef CONFIG_OCTEON_AT5810
    if (prestera_validate() == 1)
    {
        if (redhawk_validate() == 1)
        {
            if (eagle_validate() == 1)
            {
                printf (" passed\n");
            }
            else
            {
                octeon_post_error_store (PHY_FAILURE);
                printf(" Eagle read failure\n");
            }
        }
        else
        {
            octeon_post_error_store (PHY_FAILURE);
            printf(" Redhawk read failure\n");
        }
    }
    else
    {
        octeon_post_error_store (PHY_FAILURE);
        printf(" Prestera read failure\n");
    }
#else
    {   
        run_standard_phy_test();
    }
#endif
    return 0;

}

int eeprom_pmempost_short(char *notused)
{

#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
    BOOT_PROGRESS_UPDATE(BPM_PMEMPOST_SHORT);
#endif

    /* Persistent Memory Test */
    printf ("PMEMPOST / Short test started:                                    ");
    eeprom_pmempost_test(PMEMPOST_SHORT_BLOCK_TEST, PMEMPOST_PATTERN1, PMEMPOST_PATTERN2, 1, 0, 1, 0);
    return 0;
}

int eeprom_pmempost_long(char *notused)
{

#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
    BOOT_PROGRESS_UPDATE(BPM_PMEMPOST_LONG);
#endif

    /* Persistent Memory Test */
    printf ("PMEMPOST / Long test started:                                    ");
    eeprom_pmempost_test(PMEMPOST_LONG_BLOCK_TEST, PMEMPOST_PATTERN1, PMEMPOST_PATTERN2, 1, 0, 1, 0);
    return 0;
}

int eeprom_diags(void)
{
    int test_result;
#if !defined(CONFIG_OCTEON_AT5810) && !defined(CONFIG_OCTEON_DYNAMIC_BOARD_DETECTION) && !defined(CONFIG_OCTEON_56x4) && !defined(CONFIG_OCTEON_5651x)
    uint16_t rldPresent = 0;
#endif
    uint8_t ch_inp;
    char *s1;

#if defined(CONFIG_OCTEON_GEF_MMC_GENERAL)
    uint8_t post;
#endif

    int i;
    int rc;

#if !defined(CONFIG_OCTEON_AT5810) && !defined(CONFIG_OCTEON_DYNAMIC_BOARD_DETECTION) && !defined(CONFIG_OCTEON_56x4) && !defined(CONFIG_OCTEON_5651x)
    rldPresent = ((*BOARD_ID_DIPSWITCH_REG) & 0x2);
#if !defined(CONFIG_RAM_RESIDENT)
    uint16_t sw4off = ((*BOARD_ID_DIPSWITCH_REG) & 0x10);
#endif
#endif

    /* intialize the return code */
    rc = 0;

    if (tstc())
    {
        ch_inp = getc();
        if (ch_inp == 0x03) /* ctrl-c */
        {
            printf("\nAbort\n");
            return(0);
        }
    }

#if !defined(CONFIG_RAM_RESIDENT)
#if !defined(CONFIG_OCTEON_AT5810) && !defined(CONFIG_OCTEON_DYNAMIC_BOARD_DETECTION) && !defined(CONFIG_OCTEON_56x4) && !defined(CONFIG_OCTEON_5651x)
    if (!sw4off)
    {
        /* Switch / FLASH Boot enabled (DIP Switch 4) - run diags */
        rc = eeprom_all_diags_short();

        if (rc == MEMPOST_FAIL_HANG)
        {
            //we want the boot to hang b/c of a memory error
            return rc;
        }

#if defined(CONFIG_OCTEON_W3860)
        /* run quick rldram post in diag mode */
        if (rldPresent)
        {
            /* 0 = address, 1024 = data size, 1 = replication type 2X, 1 = w/ display */
            testLlm(0 ,1024, 1, 1);
        }
#endif/*CONFIG_OCTEON_W3860*/
    }
#endif/*CONFIG_OCTEON_AT5810*/
#endif /*CONFIG_RAM_RESIDENT*/

/* boards with MMCs handle post tests differently than boards w/o MMCs*/
#if defined(CONFIG_OCTEON_GEF_MMC_GENERAL)

    post = octeon_twsi_read8(BOARD_EEPROM_TWSI_ADDR, BOARD_MMC_MEMTEST_POST);
    if (post == BOARD_MMC_POST_SHORT)
    {

#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
        BOOT_PROGRESS_UPDATE(BPM_MEMPOST_SHORT);
#endif

        if (eeprom_mempost_init("Short") ==
            MEMPOST_FAIL_HANG)
        {
            return -1;
        }
    }
    else if (post == BOARD_MMC_POST_LONG)
    {

#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
        BOOT_PROGRESS_UPDATE(BPM_MEMPOST_LONG);
#endif

        if (eeprom_mempost_init("Long") ==
            MEMPOST_FAIL_HANG)
        {
            return -1;
        }
    }
    /* PMEMTEST POST */
    post = octeon_twsi_read8(BOARD_EEPROM_TWSI_ADDR, BOARD_MMC_PMEMTEST_POST);
    if (post == BOARD_MMC_POST_SHORT)
    {
        eeprom_pmempost_short("");
    }
    else if (post == BOARD_MMC_POST_LONG)
    {
        eeprom_pmempost_long("");
    }
    /* PHYTEST POST */
    post = octeon_twsi_read8(BOARD_EEPROM_TWSI_ADDR, BOARD_MMC_PHYTEST_POST);
    if (post == BOARD_MMC_POST_SHORT)
    {
        eeprom_phypost_short("");
    }
    else if (post == BOARD_MMC_POST_LONG)
    {
        eeprom_phypost_long("");
    }
    /* CSUMTEST POST */
    post = octeon_twsi_read8(BOARD_EEPROM_TWSI_ADDR, BOARD_MMC_CSUMTEST_POST);
    if (post == BOARD_MMC_POST_SHORT)
    {
        eeprom_csumpost_short("");
    }
    else if (post == BOARD_MMC_POST_LONG)
    {
        eeprom_csumpost_long("");
    }

#endif //CONFIG_OCTEON_GEF_MMC_GENERAL

    /* we want to run all the post tests if postall is defined in the environment */
    if ((s1 = getenv("postall")) != NULL)
    {
        if ((s1[0] == 's') || (s1[0] == 'S'))
        {
            rc = eeprom_all_diags_short();
        }
        else if ((s1[0] == 'l') || (s1[0] == 'L'))
        {
            rc = eeprom_all_diags_long();
        }
        if (rc == MEMPOST_FAIL_HANG)
        {
            //we want the boot to hang b/c of a memory error
            return rc;
        }
    }
    else /* lets check to see if we need to run any individual post tests */
    {
        /* Check the environment variables to see what tests we should run */
        i = 0;

        /* loop through all the post tests */
        while (postTest[i].name != NULL)
        {
            /* check to see if variable is defined */
            if ((s1 = getenv(postTest[i].name)) != NULL)
            {
                if ((s1[0] == 's') || (s1[0] == 'S'))
                {
                    if (!strncmp(postTest[i].name, "mempost", strlen("mempost")))
                    {
#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
                        BOOT_PROGRESS_UPDATE(BPM_MEMPOST_SHORT);
#endif
                        if (postTest[i].shortTest("Short") == MEMPOST_FAIL_HANG)
                        {
                            return -1;
                        }
                    }
                    else
                    {
                        postTest[i].shortTest("");
                    }
                }
                else if ((s1[0] == 'l') || (s1[0] == 'L'))
                {
                    /* mempost is handled differently from the other post tests */
                    if (!strncmp(postTest[i].name, "mempost", strlen("mempost")))
                    {
#ifdef CONFIG_OCTEON_GEF_BOOT_PROGRESS_SUPPORT
                        BOOT_PROGRESS_UPDATE(BPM_MEMPOST_LONG);
#endif
                        if (postTest[i].shortTest("Long") == MEMPOST_FAIL_HANG)
                        {
                            return -1;
                        }
                    }
                    else
                    {
                        postTest[i].longTest("");
                    }                          
                }
            }
            i++;
        }
    }


    /* tuple based testing */
    test_result = eeprom_csumtest();
    if (test_result < 0)
    {
        return(test_result);
    }
    test_result = eeprom_memtest();
    if (test_result < 0)
    {
        return(test_result);
    }

    test_result = eeprom_phytest();
    if (test_result < 0)
    {
        return(test_result);
    }

#if defined(CONFIG_OCTEON_GEF_PMEM_GENERAL)

	test_result = eeprom_pmemtest();
    if (test_result < 0)
    {
        return(test_result);
    }
#endif

#if defined(CONFIG_OCTEON_W3860)
    if (rldPresent)
    {
        test_result = checkRldram();
        if (test_result < 0)
        {
            return(test_result);
        }
    }
#endif
    return 1;
}

extern void reserved_code_store_done(void);
void reserved_code_store (ulong reserved_code)
{
    octeon_post_error_store (RESERVED_CODE_BASE + reserved_code);
    reserved_code_store_done();
}

extern void exception_code_store_done(void);
void exception_code_store (ulong exception_code)
{
    switch (exception_code)
    {
    case TLBMISS_ADDRESS:
        octeon_post_error_store (TLBMISS_EXCEPTION);
        break;
    case XTLBMISS_ADDRESS:
        octeon_post_error_store (XTLBMISS_EXCEPTION);
        break;
    case CACHE_ADDRESS:
        octeon_post_error_store (CACHE_EXCEPTION);
        break;
    case GENERAL1_ADDRESS:
        octeon_post_error_store (GENERAL1_EXCEPTION);
        break;
    case GENERAL2_ADDRESS:
        octeon_post_error_store (GENERAL2_EXCEPTION);
        break;
    case DEBUG_ADDRESS:
        octeon_post_error_store (DEBUG_EXCEPTION);
        break;
    default:
        break;
    }
    exception_code_store_done();
}

void uboot_version_num_store(void)
{
    uint16_t eeprom_buf16[OCTEON_EEPROM_MAX_TUPLE_LENGTH/2 + 1];
    uint8_t *eeprom_buf = (void *)eeprom_buf16;
    octeon_eeprom_uboot_info_t *ui = (void *)eeprom_buf;
    int i, addr;

#ifdef CONFIG_OCTEON_FAILSAFE
    /* delete the older version tuple if it exists */
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_UBOOT_FAILSAFE_INFO_TYPE, 1, (void *)ui, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        printf("\n");
        delete_tuple(addr);
    }
    ui->header.type = EEPROM_UBOOT_FAILSAFE_INFO_TYPE;
    ui->active = UBOOT_IS_ACTIVE;
    ui->uboot_partition_type = UBOOT_PARTITION;
    ui->uboot_partition_offset = 0;
    ui->uboot_partition_length = CFG_IMAGE_SIZE_MAX;
    ui->env_partition_type = ENV_PARTITION;
    ui->env_partition_offset = CFG_IMAGE_SIZE_MAX;
    ui->env_partition_length = CFG_FLASH_SECTOR_SIZE;
    ui->nfi_partition_type = NFI_PARTITION;
    ui->nfi_partition_offset = CFG_IMAGE_SIZE_MAX + CFG_FLASH_SECTOR_SIZE;
    ui->nfi_partition_length = CFG_FLASH_SECTOR_SIZE;
#elif defined ( UBOOT_LEGACY_NORMAL ) /* no failsafe implementation */
    /* delete the older version tuple if it exists */
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_UBOOT_NORMAL_INFO_TYPE, 1, (void *)ui, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        printf("\n");
        delete_tuple(addr);
    }
    ui->header.type = EEPROM_UBOOT_NORMAL_INFO_TYPE;
    ui->active = UBOOT_IS_ACTIVE;
    ui->uboot_partition_type = UBOOT_PARTITION;
    ui->uboot_partition_offset = 0;
    ui->uboot_partition_length = CFG_IMAGE_SIZE_MAX;
    ui->env_partition_type = ENV_PARTITION;
    ui->env_partition_offset = CFG_IMAGE_SIZE_MAX;
    ui->env_partition_length = CFG_FLASH_SECTOR_SIZE;
    ui->nfi_partition_type = NFI_PARTITION;
    ui->nfi_partition_offset = 0;
    ui->nfi_partition_length = 0;
#elif defined (CONFIG_OCTEON_NORMAL_IMAGE_0) /* our special bank 0 image */
    /* delete the older version tuple if it exists */
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_UBOOT_NORMAL_INFO_TYPE, 1, (void *)ui, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        printf("\n");
        delete_tuple(addr);
    }
    ui->header.type = EEPROM_UBOOT_NORMAL_INFO_TYPE;
    ui->active = UBOOT_IS_ACTIVE;
    ui->uboot_partition_type = UBOOT_PARTITION;
    ui->uboot_partition_offset = 0 + CFG_UBOOT_SIZE;
    ui->uboot_partition_length = CFG_IMAGE_SIZE_MAX;
    ui->env_partition_type = ENV_PARTITION;
    ui->env_partition_offset = CFG_IMAGE_SIZE_MAX + CFG_UBOOT_SIZE;
    ui->env_partition_length = CFG_FLASH_SECTOR_SIZE;
    ui->nfi_partition_type = NFI_PARTITION;
    ui->nfi_partition_offset = CFG_IMAGE_SIZE_MAX + CFG_FLASH_SECTOR_SIZE + CFG_UBOOT_SIZE;
    ui->nfi_partition_length = CFG_FLASH_SECTOR_SIZE;
#elif defined (CONFIG_OCTEON_NORMAL_IMAGE_1) /* our s;ecial bank 1 image */
    /* delete the older version tuple if it exists */
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_UBOOT_NORMAL_INFO_TYPE, 1, (void *)ui, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        printf("\n");
        delete_tuple(addr);
    }
    ui->header.type = EEPROM_UBOOT_NORMAL_INFO_TYPE;
    ui->active = UBOOT_IS_ACTIVE;
    ui->uboot_partition_type = UBOOT_PARTITION;
    ui->uboot_partition_offset = 0 + (2 * CFG_UBOOT_SIZE);
    ui->uboot_partition_length = CFG_IMAGE_SIZE_MAX;
    ui->env_partition_type = ENV_PARTITION;
    ui->env_partition_offset = CFG_IMAGE_SIZE_MAX + (2* CFG_UBOOT_SIZE);
    ui->env_partition_length = CFG_FLASH_SECTOR_SIZE;
    ui->nfi_partition_type = NFI_PARTITION;
    ui->nfi_partition_offset = CFG_IMAGE_SIZE_MAX + CFG_FLASH_SECTOR_SIZE + (2 * CFG_UBOOT_SIZE);
    ui->nfi_partition_length = CFG_FLASH_SECTOR_SIZE;
#else
    /* delete the older version tuple if it exists */
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_UBOOT_NORMAL_INFO_TYPE, 1, (void *)ui, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
    if (addr >= 0)
    {
        printf("\n");
        delete_tuple(addr);
    }
    ui->header.type = EEPROM_UBOOT_NORMAL_INFO_TYPE;
    ui->active = UBOOT_IS_ACTIVE;
    ui->uboot_partition_type = UBOOT_PARTITION;
    ui->uboot_partition_offset = 0 + CFG_UBOOT_SIZE;
    ui->uboot_partition_length = CFG_IMAGE_SIZE_MAX;
    ui->env_partition_type = ENV_PARTITION;
    ui->env_partition_offset = CFG_IMAGE_SIZE_MAX + CFG_UBOOT_SIZE;
    ui->env_partition_length = CFG_FLASH_SECTOR_SIZE;
    ui->nfi_partition_type = NFI_PARTITION;
    ui->nfi_partition_offset = CFG_IMAGE_SIZE_MAX + CFG_FLASH_SECTOR_SIZE + CFG_UBOOT_SIZE;
    ui->nfi_partition_length = CFG_FLASH_SECTOR_SIZE;
#endif

    ui->header.major_version = 2;
    ui->header.minor_version = 0;
    ui->header.length = sizeof(octeon_eeprom_uboot_info_t);
    for (i = 0; i < OCTEON_EEPROM_UBOOT_VERSION_NUM_SIZE; i++)
    {
        ui->version_num[i] = 0;
    }
    strncpy ((char *)&(ui->version_num[0]), (char *)U_BOOT_VERSION, (OCTEON_EEPROM_UBOOT_VERSION_NUM_SIZE-1));

    printf("Version Number Check...\n");

    write_tlv_tuple((octeon_eeprom_header_t *)ui);

    /* Attempt to mark the other U-Boot version inactive */
#ifdef CONFIG_OCTEON_FAILSAFE
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_UBOOT_NORMAL_INFO_TYPE, 2, (void *)ui, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
#else
    addr = octeon_tlv_get_tuple_addr(CFG_DEF_EEPROM_ADDR, EEPROM_UBOOT_FAILSAFE_INFO_TYPE, 2, (void *)ui, OCTEON_EEPROM_MAX_TUPLE_LENGTH);
#endif

    if (addr >= 0)
    {
        if (ui->active != UBOOT_IS_INACTIVE)
        {
            printf("Version Number Inactive Update...\n");
            ui->active = UBOOT_IS_INACTIVE;
            write_tlv_tuple((octeon_eeprom_header_t *)ui);
        }
    }
}
#endif /* CONFIG_OCTEON_TNPA3804 || CONFIG_OCTEON_AT5810 || CONFIG_OCTEON_WNPA3850 */

U_BOOT_CMD(
#ifdef CONFIG_OCTEON_TNPA3804
  tlv_eeprom, 24, 1, do_tlv_eeprom,
  "tlv_eeprom  - EEPROM data parsing for tnpa3804 board\n",
#elif defined(CONFIG_OCTEON_AT5810)
  tlv_eeprom, 24, 1, do_tlv_eeprom,
  "tlv_eeprom  - EEPROM data parsing for at5810 board\n",
#elif defined(CONFIG_OCTEON_WNPA3850) || defined(CONFIG_OCTEON_W3860) || defined(CONFIG_OCTEON_W5800)
  tlv_eeprom, 24, 1, do_tlv_eeprom,
  "tlv_eeprom  - EEPROM data parsing for WANic board\n",
#elif defined(CONFIG_OCTEON_TNPA5804)
  tlv_eeprom, 24, 1, do_tlv_eeprom,
  "tlv_eeprom  - EEPROM data parsing for tnpa5804 board\n",
#elif defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL)
  tlv_eeprom, 24, 1, do_tlv_eeprom,
  "tlv_eeprom  - EEPROM data parsing for GEFES board\n",
#else
  tlv_eeprom, 12, 1, do_tlv_eeprom,
  "tlv_eeprom  - EEPROM data parsing for ebt3000 board\n",
#endif /* CONFIG_OCTEON_TNPA3804 */

  "tlv_eeprom [display|set|delete|help]\n"
  "tlv_eeprom display\n"
  "       - display contents of eeprom data structures\n"
  "tlv_eeprom set\n"
  "       - set contents of eeprom data structures, values in hex or decimal\n"
  "       set clock [ddr_clock in Mhz] [cpu_ref_clock in Mhz * 8] [dfa_ref_clock in Mhz * 8] [spi_clock in Mhz]\n"
  "       set board [board type] [major rev] [minor rev]  [serial string]\n"

#if defined(CONFIG_OCTEON_TNPA5854) || defined(CONFIG_OCTEON_TNPA5651X)
    "       set ncmac [mac index] [mac x:x:x:x:x:x] [mac addr count]\n"
#endif

        "       set mac    [mac base x:x:x:x:x:x] [mac addr count]\n"
    "       set rtmmac [mac base x:x:x:x:x:x] [mac addr count]\n"
        "       set capability [coremask_override] [voltage * 100] [cpu core freq in Mhz]\n"
        "       set volt [voltage in millivolts] [cpu multiplier]\n"

#if defined(CONFIG_OCTEON_GEF_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_56XX_BOARD_GENERAL) || defined(CONFIG_OCTEON_GEF_63XX_BOARD_GENERAL)
  "       set uartconi [baudrate]\n"
  "       set uartmmci [baudrate]\n"
  "       set csumtesti [id] [start] [end] [csum location] [csum algorithm] [failure action]\n"
  "       set memtesti [id] [start] [end] [pattern1] [pattern2] [step] [test algorithm] [verbose] [failure action]\n"
  "       set phytesti [test algorithm] [device sel map] [failure action]\n"
  "       set pmemtesti [test algorithm] [verbose] [failure action]\n"
  "       set serdestesti [algorithm] [failure action]\n"
  "       set rldramtesti [address] [data size] [replication type] [display output 0=off 1=on]\n"
  "				- repl types: none = 0, 2X = 1, 4X = 2, 8X = 3\n"
  "       set sipi [id] [ethernet portid] [DHCP enable] [DHCP num retries] [IP addr] [subnet mask] [def GW IP addr]\n"
  "       set pfi [id] [FLASH floc] [FLASH fsize] [SIPI ID] [TFTP fname] [TFTP serv IP addr] [TFTP num retries]\n"
  "       set sfi [id] [FLASH floc] [FLASH fsize] [SIPI ID] [TFTP fname] [TFTP serv IP addr] [TFTP num retries]\n"
  "       set labi [id] [boot command] [image addr] [command arguments]\n"
  "       set scriptactive [id]\n"
  "       set script [id] [script command] {|} {script command} ...\n"
#endif /* CONFIG_OCTEON_TNPA3804 || CONFIG_OCTEON_AT5810 || CONFIG_OCTEON_TNPA5804 */


	"tlv_eeprom delete <tuple addr>\n"
	"       - deletes tuple at address and compacts any following tuples.\n"
        "\n"
        "Chip types have been deprecated, and can no longer be set.\n"
        "\n"
        "(use tlv_eeprom help for list of board types)\n"
        ""
);

#endif

#endif	/* CFG_CMD_EEPROM */
